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MT9196ASR1 参数 Datasheet PDF下载

MT9196ASR1图片预览
型号: MT9196ASR1
PDF下载: 下载PDF文件 查看货源
内容描述: 综合数字电话电路( IDPC ) [Integrated Digital Phone Circuit (IDPC)]
分类和应用: 电话电路PC
文件页数/大小: 46 页 / 636 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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MT9196  
Data Sheet  
Asynch/  
Synch  
Bit Clock  
Rate (kHz)  
CLOCKin  
(kHz)  
CSL1 CSL0  
1
0
0
0
1
128  
4096  
mandatory  
1
256  
4096  
mandatory  
0
0
0
0
0
0
1
1
0
1
0
1
512  
512  
1536  
2048  
4096  
1536  
2048  
4096  
Table 3  
For synchronous operation data is sampled, from Din, on the falling edge of the bit clock during the time slot defined  
by the STB input. Data is made available, on Dout, on the rising edge of the bit clock during the time slot defined by  
the STB input. Dout is tri-stated at all times when STB is not true. If STB is valid but no transmit path has been  
selected (via the Transmit Path Control Register) then quiet code will be transmitted on Dout during the valid strobe  
period. There is no frame delay through the FDI circuit for synchronous operation.  
For asynchronous operation Dout and Din are as defined for synchronous operation except that data is transferred  
according to the internally generated bit clock. Due to resynchronization circuitry activity, the output jitter on Dout is  
nominally larger but will not affect operation since the bit cell period at 128 kb/s and 256 kb/s is relatively large.  
There is a one frame delay through the FDI circuit for asynchronous operation. Refer to the specifications of  
Figures 13 and 14 for both synchronous and asynchronous SSI timing.  
Path Selection  
Transmit and receive audio paths are independently programmed through their respective Path Control Registers  
at addresses 12h and 13h. Individual audio path circuit blocks are powered up only as they are required to satisfy  
the programmed values in the path control registers. More detail is provided in the Power-up/down Reset section.  
Transmit  
Transmit audio path configuration (Path Control Register, address 12h) is simply a matter of assigning one of the  
three analog signal inputs, or the digital tone generator, to the required transmit B- Channel. Intermediate functions  
such as the transmit filter, encoder and transmit gain are automatically powered up and assigned as required. If  
transmit tones is selected then the digital tone generator must be programmed and enabled properly as described  
in the Digital Tone Generator section. Note that transmit tones may be enabled independently of the receive path.  
For ST-BUS mode the configuration of bits 0 to 3, at address 12h, defines both the source of transmit audio and the  
B-Channel destination. The configuration of this register permits selection of only one transmit B-Channel at a time.  
For SSI mode only the selections where bit 3 = 0 are allowed. This is because the B-Channel timeslot is defined by  
the input strobe at STB. If a selection where bit 3 = 1 is made it will be treated the same as the condition where B3  
- B0 = all zero's.  
All reserved configurations should not be used.  
Receive  
The receive path assignment (Receive Path Control Register, address 13h) is different from the transmit path  
assignment. In this case a particular analog output port is assigned a source for its audio signal. The receive filter  
audio path and the Auxiliary In analog port are the available choices. This configuration allows flexibility in  
assignment. Two examples; the receive filter path can be assigned to the handset receiver, for a standard handset  
conversation, while permitting the loudspeaker to announce a message originating from the Auxiliary In port. Or  
17  
Zarlink Semiconductor Inc.  
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