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LE58083ABGC 参数 Datasheet PDF下载

LE58083ABGC图片预览
型号: LE58083ABGC
PDF下载: 下载PDF文件 查看货源
内容描述: [PCM Codec, A/MU-Law, 1-Func, CMOS, PBGA121, GREEN, M0-219B, LFBGA-121]
分类和应用: PC电信电信集成电路
文件页数/大小: 95 页 / 915 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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Le58083  
Data Sheet  
GCI Format and Command Structure  
The GCI interface provides communication of both control and voice data between the GCI highway and subscriber line circuits  
over a single pair of pins on the Le58083 Octal SLAC device. A complete GCI frame is sent upstream on the DU pin and received  
downstream on the DD pin every 125 µs. Each frame consists of eight 4 byte GCI channels (CHN0 to 7) that contain voice and  
control information for eight pairs of channels. A particular channel pair is identified by its position within the frame (see Figure  
26). Therefore, a total of 16 voice channels can be uniquely addressed each frame. The overall structure of the GCI frame is  
shown in Figure 26.  
The 4 byte GCI channel contains the following:  
2 bytes; B1 and B2 for voice channels 1 and 2.  
One Monitor (M) byte for reading/writing control data/coefficients to the Le58083 Octal SLAC device for both  
channels.  
One Signaling and Control (SC) byte containing a 6-bit Command/Indicate (C/I) channel for control information and  
a 2-bit field with Monitor Receive and Monitor Transmit (MR, MX) bits for handshaking functions for both channels.  
All principal signaling (real-time critical) information is carried on the C/I channel. The Le58083 Octal SLAC device  
utilizes the full C/I channel capacity of the GCI channel.  
Figure 26. Multiplexed GCI Time Slot Structure  
FS  
03  
47  
811  
1215  
1619  
2023  
2427  
2831  
CHN0  
CHN1  
CHN2  
CHN3  
CHN4  
CHN5  
CHN6  
CHN7  
DU, DD  
8
8
8
8
B1  
0
B2  
M
2
SC  
1
3
6
1
1
MR  
MX  
C/I  
64  
Zarlink Semiconductor Inc.  
 
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