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LE58083ABGC 参数 Datasheet PDF下载

LE58083ABGC图片预览
型号: LE58083ABGC
PDF下载: 下载PDF文件 查看货源
内容描述: [PCM Codec, A/MU-Law, 1-Func, CMOS, PBGA121, GREEN, M0-219B, LFBGA-121]
分类和应用: PC电信电信集成电路
文件页数/大小: 95 页 / 915 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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Le58083  
Data Sheet  
Upstream C/I Channel  
The SC channel, which includes the six C/I channel bits, is transmitted upstream every frame. The bit definitions for the upstream  
C/I channel are shown below. These bits are transmitted by the Le58083 Octal SLAC device (Most significant bit first).  
GCI Format  
<------------------------ Upstream SC Octet ------------------>  
MSB  
7
LSB  
0
6
5
4
3
2
1
C3  
CDB  
CDA  
C3  
CDB  
CDA  
2
MR  
MX  
1
1
1
2
2
|<----------------------- C/I FIELD ------------->|  
Upstream Bit Definitions of the C/I field require the programmable I/O ports to be programmed as inputs. Otherwise, these bits  
follow the downstream C/I bits for CD1C, CD2C, and C3C.  
CDAC: Debounced CD1C bit of channel X.  
CDBC: The filtered CD2C bit of channel x in non-E1 demultiplexed mode or the filtered CD1BC bit in the E1 demultiplexed mode.  
C3C–C3C of channel C.  
In GCI mode, C4 and C5 are not available as upstream C/I data but can be obtained by reading the SLIC device I/O register.  
Monitor Channel  
The Monitor Channel (see Figure 28) is used to read and write the Le58083 Octal SLAC device’s coefficient registers, to read  
the status of the device and the contents of the internal registers, and to provide supplementary signaling. Information is  
transferred on the Monitor Channel using the MR and MX bits of the SC channel, providing a secure method of data exchange  
between the upstream and downstream devices.  
The Monitor byte is the third byte in the 4 byte GCI channel and is received every 125 µs over the DU or DD pins. A Monitor  
command consists of one address byte, one or more command bytes, and is followed by additional bytes of input data as  
required. The command may be followed by the Le58083 Octal SLAC device sending data bytes upstream via the DU pin.  
Monitor Channel Protocol  
Figure 28. Maximum Speed Monitor Handshake Timing  
2nd Byte  
1st Byte  
3rd Byte  
MX  
MX  
Transmitter  
Receiver  
EOM  
MR  
MR  
ACK  
1st Byte  
ACK  
2nd Byte  
ACK  
3rd Byte  
125 µs  
An inactive (high) MX and MR pair bit for two or more consecutive frames shows an idle state on the monitor channel  
and the end of message (EOM).  
67  
Zarlink Semiconductor Inc.