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LE58083ABGC 参数 Datasheet PDF下载

LE58083ABGC图片预览
型号: LE58083ABGC
PDF下载: 下载PDF文件 查看货源
内容描述: [PCM Codec, A/MU-Law, 1-Func, CMOS, PBGA121, GREEN, M0-219B, LFBGA-121]
分类和应用: PC电信电信集成电路
文件页数/大小: 95 页 / 915 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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Le58083  
Data Sheet  
MPI COMMAND STRUCTURE  
This section details each MPI command. Each command is shown along with the format of any additional data bytes that follow.  
For details of the filter coefficients of the form CXYmXY, refer to the General Description of CSD Coefficients section page 86.  
Unused bits are indicated by “RSVD”; 0’s should be written to them, but 0’s are not guaranteed when they are read.  
*Default field values are marked by an asterisk. A hardware reset forces the default values.  
Global bits and commands refer to a four-channel group of the device.  
00h Deactivate (Standby State)  
MPI Command  
D7  
0
D6  
0
D5  
0
D4  
0
D3  
0
D2  
0
D1  
0
D0  
0
Command  
In the Deactivate (Standby) state:  
All programmed information is retained.  
The Microprocessor Interface (MPI) remains active.  
The PCM inputs are disabled and the PCM outputs are high impedance unless signaling on the PCM high  
way is programmed (SMODE = 1).  
The analog output (VOUT) is disabled and biased at VREF.  
The channel status (CSTAT) bit in the SLIC device I/O Direction and Channel Status Register is set to 0.  
02h Software Reset  
MPI Command  
D7  
0
D6  
0
D5  
0
D4  
0
D3  
0
D2  
0
D1  
1
D0  
0
Command  
The action of this command is identical to that of the RST pin except that it only operates on the channels selected by the  
Channel Enable Register and it does not change clock slots, time slots, PCM highways, ground key sampling interval  
or global chip parameters. See the note under the hardware reset command that follows.  
04h Hardware Reset  
MPI Command  
D7  
0
D6  
0
D5  
0
D4  
0
D3  
0
D2  
1
D1  
0
D0  
0
Command  
Hardware reset is equivalent to pulling the RST on a four-channel group of the device Low. This command does not depend on  
the state of the Channel Enable Register.  
Note:  
The action of a hardware reset is described in Reset States on page 37 of the section Operating the Le58083 Octal SLAC Device.  
06h No Operation  
MPI Command  
D7  
0
D6  
0
D5  
0
D4  
0
D3  
0
D2  
1
D1  
1
D0  
0
Command  
0Eh Activate Channel (Operational State)  
MPI Command  
D7  
0
D6  
0
D5  
0
D4  
0
D3  
1
D2  
1
D1  
1
D0  
0
Command  
This command places the device in the Active mode and sets CSTAT = 1. No valid PCM data is transmitted until after the  
second FS pulse is received following the execution of the Activate command.  
46  
Zarlink Semiconductor Inc.  
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