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YMF724F-V 参数 Datasheet PDF下载

YMF724F-V图片预览
型号: YMF724F-V
PDF下载: 下载PDF文件 查看货源
内容描述: 为PCI总线的高性能音频控制器 [high performance audio controller for the PCI Bus]
分类和应用: 控制器PC
文件页数/大小: 50 页 / 267 K
品牌: YAMAHA [ YAMAHA CORPORATION ]
 浏览型号YMF724F-V的Datasheet PDF文件第39页浏览型号YMF724F-V的Datasheet PDF文件第40页浏览型号YMF724F-V的Datasheet PDF文件第41页浏览型号YMF724F-V的Datasheet PDF文件第42页浏览型号YMF724F-V的Datasheet PDF文件第44页浏览型号YMF724F-V的Datasheet PDF文件第45页浏览型号YMF724F-V的Datasheet PDF文件第46页浏览型号YMF724F-V的Datasheet PDF文件第47页  
YMF724F  
3. DC Characteristics  
Item  
Symbol  
Condition  
Min.  
Typ.  
Max.  
Unit  
High Level Input Voltage 1  
Low Level Input Voltage 1  
High Level Input Voltage 2  
Low Level Input Voltage 2  
High Level Input Voltage 3  
Low Level Input Voltage 3  
High Level Input Voltage 4  
Low Level Input Voltage 4  
Input Leakage Current  
VIH1  
VIL1  
VIH2  
VIL2  
VIH3  
VIL3  
VIH4  
VIL4  
IIL  
*1  
*1  
*2  
*2  
*3  
*3  
*4  
*4  
2.2  
-0.5  
2.2  
VDD5 +0.5  
0.8  
V
V
VDD5 +0.5  
0.6  
V
-0.5  
2.2  
V
V
0.8  
V
0.7VDD5  
V
0.2VDD5  
10  
V
0< VIN < VDD5  
*5, IOH1 = -1mA  
*5, IOL1 = 3mA  
*6, IOH2 = -2mA  
*6, IOL2 = 6mA  
*7, IOH3 = -4mA  
*7, IOL3 = 12mA  
*8, IOH4 = -80µA  
*8, IOL4 = 2mA  
-10  
2.4  
µA  
V
High Level Output Voltage 1  
Low Level Output Voltage 1  
High Level Output Voltage 2  
Low Level Output Voltage 2  
High Level Output Voltage 3  
Low Level Output Voltage 3  
High Level Output Voltage 4  
Low Level Output Voltage 4  
Input Pin Capacitance  
VOH1  
VOL1  
VOH2  
VOL2  
VOH3  
VOL3  
VOH4  
VOL4  
CIN  
0.55  
0.55  
0.55  
V
2.4  
2.4  
V
V
V
V
VDD5-1.0  
V
0.4  
15  
15  
15  
10  
60  
145  
2
V
5
5
pF  
pF  
pF  
µA  
mA  
mA  
mA  
mA  
Clock Pin Capacitance  
CCLK  
CIDSEL  
IOL  
IDSEL Pin Capacitance  
Output Leakage Current  
Power Supply Current 1  
(Normal Operation)  
5
-10  
PVDD+VDD5  
VDD3  
Power Supply Current 2  
(Power Save)  
*9, PVDD+VDD5  
*9, VDD3  
0.5  
6
10  
Note : Top = 0~70°C, PVDD=5.0±0.25[V], VDD5=5.0±0.25[V], VDD3=3.3±0.3[V], LVDD=3.3±0.3[V], CL=50 pF  
*1: Applicable to all PCI Iuput/Output pins and Iunput pins except PCICLK and RST# pin.  
*2: Applicable to RST# pin.  
*3: Applicable to CBCLK, CSDI, ACDI, ASDI, GP[7:4], RXD, VOLUP#, VOLDW#, ROMDI and TEST[7:0]#  
pins.  
*4: Applicable to XI24 pin.  
*5: Applicable to AD[31:0], C/BE[3:0]#, PAR, REQ#, PCREQ#, SERIRQ#, TXD, ALRCK, ASDO, ACDO, ACS#,  
ROMSK, ROMDO, ROMCS and DIT pins.  
*6: Applicable to FRAME#, IRDY#, TRDY#, STOP#, DEVSEL#, PERR#, SERR#, ABCLK, ASCLK, CRST#,  
CSYNC and CSDO pins.  
*7: Applicable to IRQ5, IRQ7, IRQ9, IRQ10, IRQ11 and INTA# pins.  
*8: Applicable to CMCLK, XRST# and XO24 pins.  
*9: DS-1 Power Control Register, DMC=DPLL0=DPLL1=PSN=PSL0=PSL1=“1”, PCICLK (33MHz) is stopped.  
January 14, 1999  
-43-  
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