YGV629
z
Reset Input
No.
items
RESET_N pin Input Time
RESET_N CPU access stand-by time after Negation
RESET_N Setup Time
Time difference in power-on
Time difference in power-off
Power supply rise time
Symbol Min.
Typ.
Max. Unit Note
1
2
3
4
5
6
twRES
twAW
tsRES
10
10
0
µs
ms
ns
S
1
2
3
4
tVSKWR
tVSKWF
tVRISE
1
1
S
200
ms
Note1) The time is defined from a point where the latest VDD reached at 3.0 V and the clock to XIN pin became
stable.
Note2) This is a specification to the VDD that rose fastest.
Note3) We recommend all the power supplies be powered on at the same time. Time difference in excess of
1 second may have an influence on reliability of the LSI.
Note4) We recommend all the power supplies be powered off at the same time. Time difference in excess of
1 second may have an influence on reliability of the LSI.
6
VDD
3.0v
3.0v
AVDD
1.65v
PLLVDD
4
6
1
3
1
RESET_N
CS_N
2
2
XIN
5
VDD
3.0v
AVDD
PLLVDD
-17-
4GV629A50