YGV629
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LSI Test
For each pin for the LSI test, be sure to observe the way of signal input, which is regulated here strictly.
z
XTEST2-0 (Input Pin No.96-98)
Teat mode setting pin for VC1 test. Be sure to use under the following settings.
Pin Name
Input Level
XTEST2
H
XTEST1
H
XTEST0
H
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Others
z
NC (Pin No.4, 101, 108, 144)
Non connection pin. Nothing is connected.
-13-
4GV629A50