YGV629
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Clock
Supply two clocks of the display system clock and the reference clock to the VC1 separately.
The display system clock becomes the original of a clock (dot clock) that is used for outputting monitor scan
timing and display data.
The reference clock becomes the original of a clock (system clock) that is used for the process except the
above.
The system clock and dot clock can be generated from the reference clock by supplying only the reference
clock to VC1.
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z
XIN (Input Pin No.141)
XOUT (Output Pin No.142)
The reference clock input pin. Reference clock of the built-in PLL is input.
z
DTCKIN (Input Pin No.12)
Display system clock input pin. Input a clock which becomes the original of a clock (dot clock) that is
used for outputting monitor scan timing and display data.
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z
DTCKS_N (Input Pin No.11)
Display system clock selection pin. The signal selects a pin to input the display system clock.
PLLCTL5-0 (Input Pin No.5-10)
PLL control pin. The pins set the multiplication number of the system clock that is generated in the
built-in PLL to the reference clock.
z
FILTER (Analog Pin No.2)
A filter connection pin for the built-in PLL that is used for the system clock oscillation.
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CPU Interface
Each CPU interface pin is used for the interface with the host CPU. The host CPU can control VC1 as an
external I/O device.
The CPU interface of VC1 can select the 8-bit parallel interface or the serial interface. And, since its access
timing is asynchronous interface, connection to various CPUs is possible.
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z
D7-0 (Input Output Pin No.15-22)
CPU data bus pin. The data bus pins are connected to the CPU external bus when 8-bit parallel interface
is selected.
PS2-0 (Input Output Pin No.31-33)
Selection pin for the internal port.
Connect the pins to the CPU external address bus when 8-bit parallel interface is selected.
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z
CS_N (Input Pin No.28)
Chip-select input pin. Input the chip-select signal to the pin when 8-bit parallel interface is selected.
RD_N (Input Pin No.30)
Read pulse input pin.
The strobe signal for the data read (from CPU to VC1) is input when using in 8-bit parallel interface.
z
WR_N (Input Pin No.29)
Write pulse input pin. The strobe signal for the data write (from CPU to VC1) is input when using in 8-bit
parallel interface.
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4GV629A50
YAMAHA [ YAMAHA CORPORATION ]
