YGV629
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WAIT_N (3-state output Pin No.23)
CPU bus wait pin. The bus wait request signal to CPU is output from this pin when using in 8-bit parallel
interface.
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READY_N (3-state output Pin No.24)
CPU bus ready pin. The bus ready signal to CPU is output from this pin when using in 8-bit parallel
interface.
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INT_N (Open drain output Pin No.25)
Interrupt signal output pin. An interrupt request signal to CPU is output.
SER_N (Output Pin No.38)
CPU interface selection pin.
This pin selects which to select as a CPU interface from the serial interface or the 8-bit parallel interface.
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SCS_N(Input Pin No.36)
Serial interface chip select input pin.
The chip-select signal is input when using in the serial interface. SDIN pin and SCLK pin becomes valid
SDIN (Input Pin No.35)
Serial data input pin.
Data is input when using in serial interface.
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SDOUT (3-state output Pin No.34)
Serial data output pin. Data is output when using in serial interface.
SCLK (Input Pin No.37)
Serial clock input pin. A clock is input when using in serial interface.
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Pattern Memory Interface
Each pin of the pattern memory interface is used as the interface with the pattern memory, which is connected
to the VC1 local bus. Mask-ROM, NOR type flash-memory, and SRAM, etc. can be connected to the pattern
memory.
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MD15-0 (Input Output Pin No.75-80, 83-90, 93, 94)
Pattern memory data bus pin. These pins are connected to the data bus of the pattern memory.
MA24 - 0(3-state output Pin No.42-47, 49-54, 57-62, 64-70)
Pattern memory address bus pin. These pins are connected to the address bus of the pattern memory.
MOE_N(3-state output Pin No.74)
Pattern memory output enable pin. The output enable signal to the pattern memory is output.
MWE_N(3-state output Pin No.73)
Pattern memory write pulse output pin. The write enable signal to the pattern memory is output.
RAHZ_N (Input Pin No.95)
Pattern memory high-impedance switching pin.
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4GV629A50
YAMAHA [ YAMAHA CORPORATION ]
