R
Spartan-II FPGA Family: Functional Description
Boundary-scan operation is independent of individual IOB
configurations, and unaffected by package type. All IOBs,
including unbonded ones, are treated as independent
3-state bidirectional pins in a single scan chain. Retention of
the bidirectional test capability after configuration facilitates
the testing of external interconnections.
The public boundary-scan instructions are available prior to
configuration. After configuration, the public instructions
remain available together with any USERCODE
instructions installed during the configuration. While the
SAMPLE and BYPASS instructions are available during
configuration, it is recommended that boundary-scan
operations not be performed during this transitional period.
Table 7 lists the boundary-scan instructions supported in
Spartan-II FPGAs. Internal signals can be captured during
EXTEST by connecting them to unbonded or unused IOBs.
They may also be connected to the unused outputs of IOBs
defined as unidirectional input pins.
In addition to the test instructions outlined above, the
boundary-scan circuitry can be used to configure the FPGA,
and also to read back the configuration data.
To facilitate internal scan chains, the User Register
provides three outputs (Reset, Update, and Shift) that
represent the corresponding states in the boundary-scan
internal state machine.
Table 7: Boundary-Scan Instructions
Boundary-Scan
Command
Binary
Code[4:0]
Description
EXTEST
SAMPLE
USR1
00000
00001
00010
00011
00100
Enables boundary-scan
EXTEST operation
Enables boundary-scan
SAMPLE operation
Access user-defined
register 1
USR2
Access user-defined
register 2
CFG_OUT
Access the
configuration bus for
Readback
CFG_IN
00101
Access the
configuration bus for
Configuration
INTEST
USRCODE
IDCODE
HIZ
00111
01000
01001
01010
Enables boundary-scan
INTEST operation
Enables shifting out
USER code
Enables shifting out of
ID Code
Disables output pins
while enabling the
Bypass Register
JSTART
01100
11111
Clock the start-up
sequence when
StartupClk is TCK
BYPASS
Enables BYPASS
RESERVED
All other
codes
Xilinx® reserved
instructions
DS001-2 (v2.8) June 13, 2008
Product Specification
www.xilinx.com
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