R
Spartan and Spartan-XL Families Field Programmable Gate Arrays
Spartan-XL DC Characteristics Over Operating Conditions
Symbol
Description
Min
Typ.
Max
Units
V
High-level output voltage @ I
= –4.0 mA, V min (LVTTL)
CC
2.4
-
-
-
-
-
-
-
V
V
V
V
V
V
OH
OH
OH
High-level output voltage @ I
= –500 µA, (LVCMOS)
90% V
-
0.4
CC
(1)
(2)
V
Low-level output voltage @ I = 12.0 mA, V min (LVTTL)
-
-
OL
OL
CC
Low-level output voltage @ I = 24.0 mA, V min (LVTTL)
0.4
OL
CC
Low-level output voltage @ I = 1500 µA, (LVCMOS)
-
10% V
-
OL
CC
V
Data retention supply voltage (below which configuration data
may be lost)
2.5
DR
(3,4)
I
Quiescent FPGA supply current
Commercial
Industrial
-
0.1
0.1
0.1
0.1
-
2.5
5
mA
mA
mA
mA
µA
CCO
-
(3,5)
I
Power Down FPGA supply current
Commercial
Industrial
-
2.5
5
CCPD
-
–10
-
I
Input or output leakage current
10
10
0.25
-
L
C
Input capacitance (sample tested)
-
pF
IN
I
Pad pull-up (when selected) @ V = 0V (sample tested)
0.02
0.02
-
mA
mA
RPU
RPD
IN
I
Pad pull-down (when selected) @ V = 3.3V (sample tested)
-
IN
Notes:
1. With up to 64 pins simultaneously sinking 12 mA (default mode).
2. With up to 64 pins simultaneously sinking 24 mA (with 24 mA option selected).
3. With 5V tolerance not selected, no internal oscillators, and the FPGA configured with the Tie option.
4. With no output current loads, no active input resistors, and all package pins at V or GND.
CC
5. With PWRDWN active.
Supply Current Requirements During Power-On
Spartan-XL FPGAs require that a minimum supply current
be provided to the V lines for a successful power
on. If more current is available, the FPGA can consume
A maximum limit for I
using foldback/crowbar supplies and fuses. It is possible to
control the magnitude of I by limiting the supply current
is not specified. Be careful when
CCPO
I
CCPO
CC
CCPO
more than I
reliability.
min., though this cannot adversely affect
available to the FPGA. A current limit below the trip level will
avoid inadvertently activating over-current protection cir-
cuits.
CCPO
Symbol
Description
Min
100
-
Max
-
Units
mA
I
Total V supply current required during power-on
CCPO
CC
(2,3)
T
V
ramp time
CC
50
ms
CCPO
Notes:
1. The I
requirement applies for a brief time (commonly only a few milliseconds) when V ramps from 0 to 3.3V.
CC
CCPO
2. The ramp time is measured from GND to V max on a fully loaded board.
CC
3.
V
must not dip in the negative direction during power on.
CC
DS060 (v1.6) September 19, 2001
www.xilinx.com
53
Product Specification
1-800-255-7778
XILINX [ XILINX, INC ]
