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XCS20-3PQ208C 参数 Datasheet PDF下载

XCS20-3PQ208C图片预览
型号: XCS20-3PQ208C
PDF下载: 下载PDF文件 查看货源
内容描述: 斯巴达和Spartan-XL系列现场可编程门阵列 [Spartan and Spartan-XL Families Field Programmable Gate Arrays]
分类和应用: 现场可编程门阵列
文件页数/大小: 82 页 / 848 K
品牌: XILINX [ XILINX, INC ]
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R
Spartan and Spartan-XL Families Field Programmable Gate Arrays  
Table 17: Spartan/XL Program Data  
Device  
XCS05  
XCS10  
XCS20  
XCS30  
XCS40  
Max System  
Gates  
5,000  
10,000  
20,000  
30,000  
40,000  
CLBs  
100  
196  
400  
576  
784  
(Row x Col.)  
(10 x 10)  
(14 x 14)  
(20 x 20)  
(24 x 24)  
(28 x 28)  
IOBs  
80  
112  
160  
192  
224  
Part Number  
Supply Voltage  
Bits per Frame  
Frames  
XCS05 XCS05XL XCS10 XCS10XL XCS20 XCS20XL XCS30 XCS30XL XCS40 XCS40XL  
5V  
126  
3.3V  
127  
5V  
166  
3.3V  
167  
573  
5V  
3.3V  
227  
789  
5V  
3.3V  
267  
933  
5V  
306  
3.3V  
307  
226  
788  
266  
932  
428  
429  
572  
1,076  
1,077  
Program Data  
53,936  
53,984  
54,491  
54,544  
94,960  
95,008  
95,699 178,096 179,111 247,920 249,119 329,264 330,647  
95,752 178,144 179,160 247,968 249,168 329,312 330,696  
PROM Size  
(bits)  
Serial PROM  
17S05 17S05XL 17S10 17S10XL 17S20 17S20XL 17S30 17S30XL 17S40 17S40XL  
79,072 128,488 221,056 298,696 387,856  
Express Mode  
PROM Size  
(bits)  
-
-
-
-
-
Notes:  
1. Bits per Frame = (10 x number of rows) + 7 for the top + 13 for the bottom + 1 + 1 start bit + 4 error check bits (+1 for Spartan-XL  
device)  
Number of Frames = (36 x number of columns) + 26 for the left edge + 41 for the right edge + 1 (+ 1 for Spartan-XL device)  
Program Data = (Bits per Frame x Number of Frames) + 8 postamble bits  
PROM Size = Program Data + 40 (header) + 8, rounded up to the nearest byte  
2. The user can add more "1" bits as leading dummy bits in the header, or, if CRC = off, as trailing dummy bits at the end of any frame,  
following the four error check bits. However, the Length Count value must be adjusted for all such extra "one" bits, even for extra  
leading ones at the beginning of the header.  
3. Express mode adds 57 (XCS05XL, XCS10XL), or 53 (XCS20XL, XCS30XL, XCS40XL) bits per frame, + additional start-up bits.  
During Readback, 11 bits of the 16-bit checksum are added  
to the end of the Readback data stream. The checksum is  
computed using the CRC-16 CCITT polynomial, as shown  
in Figure 29. The checksum consists of the 11 most signifi-  
cant bits of the 16-bit code. A change in the checksum indi-  
cates a change in the Readback bitstream. A comparison to  
a previous checksum is meaningful only if the readback  
data is independent of the current device state. CLB outputs  
should not be included (Readback Capture option not  
used), and if RAM is present, the RAM content must be  
unchanged.  
Statistically, one error out of 2048 might go undetected.  
DS060 (v1.6) September 19, 2001  
Product Specification  
www.xilinx.com  
1-800-255-7778  
33  
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