Spartan-3E FPGA Family: Pinout Descriptions
FG320
Table 147: FG320 Package Pinout (Cont’d)
Bank
XC3S500E Pin Name
N.C. ()
XC3S1200E Pin Name
XC3S1600E Pin Name
Type
Ball
3
IO_L22P_3
IO_L22P_3
P3
500E: N.C.
1200E: I/O
1600E: I/O
3
3
3
3
3
3
IO_L23N_3
IO_L23P_3
IO_L24N_3
IO_L24P_3
IP
IO_L23N_3
IO_L23P_3
IO_L24N_3
IO_L24P_3
IP
IO_L23N_3
IO_L23P_3
IO_L24N_3
IO_L24P_3
IP
R2
R3
T1
T2
D3
F4
I/O
I/O
I/O
I/O
INPUT
IO
IP
IP
500E: I/O
1200E: INPUT
1600E: INPUT
3
3
3
3
3
3
3
3
3
3
3
3
IP
IP
IP
F5
G1
J7
INPUT
INPUT
IP
IP
IP
IP
IP
IP
INPUT
IP
IP
IP
K2
K7
M1
N1
N2
R1
U1
J6
INPUT
IP
IP
IP
INPUT
IP
IP
IP
INPUT
IP
IP
IP
INPUT
IP
IP
IP
INPUT
IP
IP
IP
INPUT
IP
IP
IP
INPUT
IP/VREF_3
IO/VREF_3
IP/VREF_3
IP/VREF_3
IP/VREF_3
IP/VREF_3
VREF
R4
500E: VREF(I/O)
1200E:
VREF(INPUT)
1600E:
VREF(INPUT)
3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
VCCO_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
VCCO_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
F3
H7
VCCO
VCCO
VCCO
VCCO
VCCO
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
3
3
K1
3
L7
3
N3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
A1
GND
GND
GND
A18
B2
GND
GND
GND
GND
GND
GND
B17
C10
G7
G12
H8
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
H9
GND
GND
GND
H10
H11
J3
GND
GND
GND
GND
GND
GND
GND
GND
GND
J8
GND
GND
GND
J11
DS312 (v4.2) December 14, 2018
www.xilinx.com
Product Specification
204
XILINX [ XILINX, INC ]
