R
Functional Description
Spartan-3E FPGA
SPI Serial Flash PROM
FFFFF
User Data
MOSI
DATA_IN
DATA_OUT
CLOCK
MicroBlaze
Code
DIN
CCLK
FPGA-based
SPI Master
FPGA
CSO_B
SELECT
Configuration
+3.3V
0
User-I/O
SPI Peripherals
• A/D Converter
• D/A Converter
• CAN Controller
DATA_IN
DATA_OUT
CLOCK
• Temperature Sensor
• Displays
• Temperature Sensor
• Microcontroller
• ASSP
SELECT
DS312-2_47_022205
To other SPI slave peripherals
Figure 53: Using the SPI Flash Interface After Configuration
Similarly, the SPI bus can be expanded to additional SPI
peripherals. Because SPI is a common industry-standard
interface, there are a variety of SPI-based peripherals avail-
able, including analog-to-digital (A/D) converters, digi-
tal-to-analog (D/A) converters, CAN controllers, and
temperature sensors.
peripheral data sheet for specific interface and communica-
tion protocol requirements.
Daisy-Chaining
If the application requires multiple FPGAs with different con-
figurations, then configure the FPGAs using a daisy chain,
as shown in Figure 54. Use SPI Flash mode
(M[2:0] = <0:0:1>) for the FPGA connected to the Platform
Flash PROM and Slave Serial mode (M[2:0] = <1:1:1>) for
all other FPGAs in the daisy-chain. After the master
FPGA—the FPGA on the left in the diagram—finishes load-
ing its configuration data from the SPI Flash PROM, the
master device uses its DOUT output pin to supply data to
the next device in the daisy-chain, on the falling CCLK edge.
The MOSI, DIN, and CCLK pins are common to all SPI
peripherals. Connect the select input on each additional SPI
peripheral to one of the FPGA user I/O pins. If HSWAP = 0
during configuration, the FPGA holds the select line High. If
HSWAP = 1, connect the select line to +3.3V via an external
4.7 kΩ pull-up resistor to avoid spurious read or write oper-
ations. After configuration, drive the select line Low to select
the desired SPI peripheral. Refer to the individual SPI
70
www.xilinx.com
DS312-2 (v1.1) March 21, 2005
Advance Product Specification
XILINX [ XILINX, INC ]
