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XC3S1600E-4FGG320C 参数 Datasheet PDF下载

XC3S1600E-4FGG320C图片预览
型号: XC3S1600E-4FGG320C
PDF下载: 下载PDF文件 查看货源
内容描述: 的Spartan- 3E FPGA系列 [Spartan-3E FPGA Family]
分类和应用: 现场可编程门阵列可编程逻辑时钟
文件页数/大小: 193 页 / 1733 K
品牌: XILINX [ XILINX, INC ]
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R
Functional Description  
COUT  
YB  
1
CYMUXG  
Y
G[4:1]  
A[4:1]  
G-LUT  
CYSELG  
CY0G  
G1 G2  
YQ  
D
FFY  
XORG  
GAND  
1
0
BY  
XB  
X
1
4
CYMUXF  
F[4:1]  
A[4:1]  
F-LUT  
CYSELF  
CY0F  
F1  
F2  
XQ  
D
FFX  
XORF  
CYINIT  
FAND  
1
0
BX  
DS312-2_14_021305  
CIN  
Figure 19: Carry Logic  
Table 11: Carry Logic Functions  
Function  
Description  
CYINIT  
Initializes carry chain for a slice. Fixed selection of:  
CIN carry input from the slice below  
BX input  
CY0F  
Carry generation for bottom half of slice. Fixed selection of:  
F1 or F2 inputs to the LUT (both equal 1 when a carry is to be generated)  
FAND gate for multiplication  
BX input for carry initialization  
Fixed "1" or "0" input for use as a simple Boolean function  
CY0G  
Carry generation for top half of slice. Fixed selection of:  
G1 or G2 inputs to the LUT (both equal 1 when a carry is to be generated)  
GAND gate for multiplication  
BY input for carry initialization  
Fixed "1" or "0" input for use as a simple Boolean function  
CYMUXF  
Carry generation or propagation mux for bottom half of slice. Dynamic selection via CYSELF of:  
CYINIT carry propagation (CYSELF = 1)  
CY0F carry generation (CYSELF = 0)  
DS312-2 (v1.1) March 21, 2005  
www.xilinx.com  
21  
Advance Product Specification  
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