R
Spartan-IIE FPGA Family: Pinout Tables
Revision History
Version
No.
1.0
1.1
2.0
Date
Description
11/15/01 Initial Xilinx release.
12/20/01 Corrected differential pin pair designations.
11/18/02 Added XC2S400E and XC2S600E and FG676. Removed L37 designation from FT256 pinouts.
Minor corrections and clarifications to pinout definitions. Removed Preliminary designation.
2.1
2.3
02/14/03 Added differential pairs table on page 57, fixed 3 P/N designation typos introduced in v2.0.
Clarified that XC2S50E has two VREF pins per bank.
06/18/08 Added Package Overview section. Updated all modules for continuous page, figure, and table
numbering. Updated links. Synchronized all modules to v2.3.
108
www.xilinx.com
DS077-4 (2.3) June 18, 2008
Product Specification
XILINX [ XILINX, INC ]
