R
Spartan-IIE FPGA Family: Pinout Tables
Device-Specific Pinouts
FG676 Pinouts (XC2S400E, XC2S600E) (Continued)
Pad Name
LVDS Async.
VREF
Function
I/O, L14N_YY
Bank
Pin
E10
G10
A9
Output Option
Option
XC2S400E
I/O, L14N_YY
-
XC2S600E
I/O, L14N_YY
I/O
0
0
0
0
0
0
0
0
0
All
-
-
I/O
-
I/O, L13P
I/O, L13N
I/O
XC2S600E
-
I/O, L13P
I/O, L13N
-
I/O, L13P_Y
I/O, L13N_Y
I/O
B9
XC2S600E
-
H10
C9
-
All
All
-
-
I/O, L12P_YY
I/O, L12N_YY
I/O
-
I/O, L12P_YY
I/O, L12N_YY
I/O
I/O, L12P_YY
I/O, L12N_YY
I/O
D9
-
E9
-
I/O, VREF Bank 0,
L11P
F9
-
All
I/O, VREF Bank 0,
L11P
I/O, VREF Bank 0,
L11P
I/O, L11N
I/O, L10P
I/O, L10N
I/O
0
0
0
0
0
0
G9
A8
B8
H9
E8
F8
-
-
I/O, L11N
I/O, L10P
I/O, L10N
I/O
I/O, L11N
I/O, L10P
I/O, L10N
I/O
-
-
-
-
-
-
I/O, L9P
I/O, L9N
XC2S600E
XC2S600E
-
I/O
I/O, L9P_Y
XC2S600E
-
I/O, VREF Bank 0,
L9N_Y
I/O, L8P
I/O, L8N
I/O
0
0
0
0
0
0
0
0
A7
B7
G8
C7
D7
E7
F7
G7
XC2S600E
-
-
I/O, L8P
I/O, L8N
I/O
I/O, L8P_Y
I/O, L8N_Y
I/O
XC2S600E
-
-
I/O, L7P_YY
I/O, L7N_YY
I/O
All
All
-
-
I/O, L7P_YY
I/O, L7N_YY
-
I/O, L7P_YY
I/O, L7N_YY
I/O
-
-
I/O, L6P_YY
All
All
-
I/O, L6P_YY
I/O, L6P_YY
I/O, VREF Bank 0,
L6N_YY
All
I/O, VREF Bank 0,
L6N_YY
I/O, VREF Bank 0,
L6N_YY
I/O
0
0
0
0
0
0
0
0
A6
B6
C6
D6
E6
F6
A5
B5
-
-
-
-
I/O
I/O, L5P
I/O, L5N
I/O, L4P
I/O, L4N
-
I/O
I/O, L5P
I/O, L5N
I/O, L4P
I/O, L4N
I/O
I/O, L5P
I/O, L5N
I/O, L4P
I/O, L4N
I/O
-
-
-
-
-
-
-
-
I/O, L3P_YY
All
All
-
I/O, L3P_YY
I/O, L3P_YY
I/O, VREF Bank 0,
L3N_YY
All
I/O, VREF Bank 0,
L3N_YY
I/O, VREF Bank 0,
L3N_YY
I/O, L2P_YY
0
D5
All
-
I/O, L2P_YY
I/O, L2P_YY
DS077-4 (2.3) June 18, 2008
www.xilinx.com
105
Product Specification
XILINX [ XILINX, INC ]
