R
Spartan-IIE FPGA Family: Pinout Tables
FG676 Pinouts (XC2S400E, XC2S600E) (Continued)
Pad Name
Device-Specific Pinouts
XC2S400E XC2S600E
LVDS Async.
Output Option
VREF
Option
Function
I/O, L51N
Bank
Pin
D24
C25
C26
2
2
2
-
-
-
-
-
-
-
I/O, L51N
I/O, L51P
I/O, L51P
I/O (DIN, D0),
L50N_YY
All
I/O (DIN, D0),
L50N_YY
I/O (DIN, D0),
L50N_YY
I/O (DOUT, BUSY),
L50P_YY
2
B26
All
-
I/O (DOUT, BUSY),
L50P_YY
I/O (DOUT, BUSY),
L50P_YY
CCLK
TDO
TDI
2
2
-
A25
C23
D22
-
-
-
-
-
-
CCLK
TDO
TDI
CCLK
TDO
TDI
I/O (CS), L49P_YY
1
1
B24
A24
All
All
-
-
I/O (CS), L49P_YY
I/O (CS), L49P_YY
I/O (WRITE), L49N_YY
I/O (WRITE),
L49N_YY
I/O (WRITE),
L49N_YY
I/O, L48P
1
1
1
1
1
1
1
B23
A23
B22
A22
D21
C21
B21
-
-
-
I/O
I/O, L48P
I/O, L48N
I/O, L48N
-
XC2S400E
XC2S400E
All
-
I/O, L47P
-
I/O, L47P_Y
I/O, L47N_Y
I/O, L46P_YY
I/O, L46N_YY
I/O, L47P
I/O, L47N
-
I/O, L47N
I/O, L46P_YY
I/O, L46N_YY
-
I/O, L46P_YY
I/O, L46N_YY
All
-
I/O, VREF Bank 1,
L45P_YY
All
All
I/O, VREF Bank 1,
L45P_YY
I/O, VREF Bank 1,
L45P_YY
I/O, L45N_YY
I/O, L44P
1
1
1
1
1
1
1
1
A21
F20
E20
D20
C20
B20
A20
G19
All
-
-
I/O, L45N_YY
-
I/O, L45N_YY
I/O, L44P_Y
I/O, L44N_Y
I/O, L43P_YY
I/O, L43N_YY
I/O, L42P_YY
I/O, L42N_YY
XC2S600E
I/O, L44N
XC2S600E
-
I/O
I/O, L43P_YY
I/O, L43N_YY
I/O, L42P_YY
I/O, L42N_YY
All
All
All
All
All
-
I/O, L43P_YY
I/O, L43N_YY
I/O, L42P_YY
I/O, L42N_YY
-
-
-
I/O, VREF Bank 1,
L41P_YY
All
I/O, VREF Bank 1,
L41P_YY
I/O, VREF Bank 1,
L41P_YY
I/O, L41N_YY
I/O
1
1
1
1
1
1
F19
E19
B19
A19
H18
G18
All
-
-
-
-
-
-
I/O, L41N_YY
-
I/O, L41N_YY
I/O
-
I/O, L40P_YY
I/O, L40N_YY
I/O
All
I/O, L40P_YY
I/O, L40N_YY
I/O
I/O, L40P_YY
I/O, L40N_YY
I/O
All
-
I/O, L39P
XC2S600E
I/O, L39P
I/O, L39P_Y
102
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DS077-4 (2.3) June 18, 2008
Product Specification
XILINX [ XILINX, INC ]
