OPB 16450 UART
Table 3:
Parameter-Port Dependencies
Name
Design
Paramet
ers
G1
G2
G3
G4
G5
G6
G7
G8
G9
I/O
Signals
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
OPB_seqAddr
Sln_DBus(0:C_OPB_DWIDTH-1)
Sln_ErrAck
Sln_Retry
Sln_ToutSup
Sln_XferAck
G2
Width varies with the size of the
OPB Data bus.
C_BASEADDR
C_OPB_DWIDTH
C_OPB_AWIDTH
C_DEV_BLK_ID
C_DEV_MIR_ENABLE
D_HIGHADDR
C_HAS_EXTERNAL_XIN
C_HAS_EXTERNAL_RCLK
C_IS_A_16550
OPB_ABus(0:C_OPB_AWIDTH-1)
OPB_BE(0:(C_OPB_AWIDTH/8)-1)
OPB_DBus(0:C_OPB_DWIDTH-1)
OPB_RNW
G3
G3
G2
Width varies with the size of the
OPB Address bus.
Width varies with the size of the
OPB Address bus.
Width varies with the size of the
OPB Data bus.
P17
P14
G3
Bus width affects maximum
allowable address.
Connects XIN to OPB_CLK
Connects RCLK to baudoutN
P3, P7
P1, P2
Affects Depends
G3
Relationship Description
Bus width affects maximum
allowable address.
Affects number of bits in bus.
Affects number of bits in bus.
DS433 August 18, 2004
Product Specification
1-800-255-7778
5
XILINX [ XILINX, INC ]
