R
Package Marking
provides a top marking example for Spartan-3E
FPGAs in the quad-flat packages.
shows the top
marking for Spartan-3E FPGAs in BGA packages except
the 132-ball chip-scale package (CP132 and CPG132). The
markings for the BGA packages are nearly identical to those
for the quad-flat packages, except that the marking is
rotated with respect to the ball A1 indicator.
shows
the top marking for Spartan-3E FPGAs in the CP132 and
CPG132 packages.
On the QFP and BGA packages, the optional numerical
Stepping Code follows the Lot Code.
The “5C” and “4I” part combinations can have a dual mark
of “5C/4I”. Devices with a single mark are only guaranteed
for the marked speed grade and temperature range. All “5C”
and “4I” part combinations use the Stepping 1 production
silicon.
Mask Revision Code
Fabrication Code
R
SPARTAN
Device Type
Package
Speed Grade
Temperature Range
TM
R
Process Technology
Date Code
Stepping Code
(optional)
Lot Code
XC3S250E
PQ208AGQ0525
D1234567A
4C
Pin P1
DS312-1_06_102905
Figure 2:
Spartan-3E QFP Package Marking Example
Mask Revision Code
BGA Ball A1
Device Type
Package
R
SPARTAN
R
Fabrication Code
Process Code
XC3S250E
TM
FT256AGQ0525
D1234567A
4C
Date Code
Stepping Code
(optional)
Lot Code
Speed Grade
Temperature Range
DS312-1_02_090105
Figure 3:
Spartan-3E BGA Package Marking Example
Ball A1
Lot Code
3S250E
F1234567-0525
PHILIPPINES
Device Type
Date Code
Temperature Range
Package
C5 = CP132
C6 = CPG132
C5AGQ
4C
Speed Grade
Process Code
Fabrication Code
DS312-1_05_032105
Mask Revision Code
Figure 4:
Spartan-3E CP132 and CPG132 Package Marking Example
6
DS312-1 (v3.8) August 26, 2009
Product Specification
XILINX [ XILINX, INC ]
