R
DC and Switching Characteristics
Miscellaneous DCM Timing
Table 110: Miscellaneous DCM Timing
Symbol
Description
Min
Max
Units
(1)
DCM_RST_PW_MIN
Minimum duration of a RST pulse width
3
-
CLKIN
cycles
(2)
DCM_RST_PW_MAX
Maximum duration of a RST pulse width
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
seconds
seconds
minutes
minutes
(3)
DCM_CONFIG_LAG_TIME
Maximum duration from V
applied to FPGA
CCINT
configuration successfully completed (DONE pin goes
High) and clocks applied to DCM DLL
Notes:
1. This limit only applies to applications that use the DCM DLL outputs (CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180, and CLKDV).
The DCM DFS outputs (CLKFX, CLKFX180) are unaffected.
2. This specification is equivalent to the Virtex-4 DCM_RESET specfication.This specification does not apply for Spartan-3E FPGAs.
3. This specification is equivalent to the Virtex-4 TCONFIG specification. This specification does not apply for Spartan-3E FPGAs.
DS312-3 (v3.8) August 26, 2009
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Product Specification
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