R
Platform Flash In-System Programmable Configuration PROMs
AC Electrical Characteristics
AC Characteristics Over Operating Conditions
XCFxxS and XCFxxP PROM as Configuration Slave with CLK Input Pin as Clock Source
X-Ref Target - Figure 7
T
SCE
CE
T
HCE
T
HOE
T
CYC
OE/RESET
T
T
HC
LC
CLK
T
T
HB
SB
T
T
DF
OH
BUSY
T
OE
T
CAC
(optional)
T
CE
DATA
T
T
OH
CF
THCF
CF
EN_EXT_SEL
REV_SEL[1:0]
T
T
T
T
HXT
SXT
HXT
SXT
T
T
T
T
HRV
SRV
HRV
SRV
ds123_22_122905
XCF01S, XCF02S,
XCF04S
XCF08P, XCF16P,
XCF32P
Symbol
Description
Units
Min
Max
Min
Max
CF hold time to guarantee design revision selection is
sampled when VCCO = 3.3V or 2.5V(9)
300
300
ns
ns
THCF
CF hold time to guarantee design revision selection is
sampled when VCCO = 1.8V(9)
300
300
CF to data delay when VCCO = 3.3V or 2.5V(8)
CF to data delay when VCCO = 1.8V(8)
OE/RESET to data delay(6) when VCCO = 3.3V or 2.5V
OE/RESET to data delay(6) when VCCO = 1.8V
CE to data delay(5) when VCCO = 3.3V or 2.5V
CE to data delay(5) when VCCO = 1.8V
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
25
25
25
25
25
25
25
25
ns
ns
ns
ns
ns
ns
ns
ns
TCF
–
10
30
15
30
15
30
TOE
TCE
TCAC
CLK to data delay(7) when VCCO = 3.3V or 2.5V
CLK to data delay(7) when VCCO = 1.8V
Data hold from CE, OE/RESET, CLK, or CF
when VCCO = 3.3V or 2.5V(8)
0
0
–
–
–
–
5
5
–
–
–
–
ns
ns
ns
ns
TOH
Data hold from CE, OE/RESET, CLK, or CF
when VCCO = 1.8V(8)
CE or OE/RESET to data float delay(2)
when VCCO = 3.3V or 2.5V
CE or OE/RESET to data float delay(2)
when VCCO = 1.8V
25
30
45
45
TDF
DS123 (v2.18) May 19, 2010
www.xilinx.com
Product Specification
16
XILINX [ XILINX, INC ]
