R
Spartan and Spartan-XL FPGA Families Data Sheet
Readback Switching Characteristics Guidelines
The following guidelines reflect worst-case values over the
recommended operating conditions.
Finished
Internal Net
rdbk.TRIG
T
RCRT
T
RCRT
T
RTRC
T
RTRC
rdclk.I
T
RCL
T
RCH
rdbk.RIP
T
RCRR
DUMMY
DUMMY
VALID
VALID
rdbk.DATA
T
RCRD
DS060_32_080400
Figure 33: Spartan and Spartan-XL Readback Timing Diagram
Spartan and Spartan-XL Readback Switching Characteristics
Symbol
TRTRC
TRCRT
TRCRD
TRCRR
TRCH
Description
rdbk.TRIG setup to initiate and abort Readback
rdbk.TRIG hold to initiate and abort Readback
rdbk.DATA delay
Min
200
50
-
Max
-
Units
ns
rdbk.TRIG
rdclk.I
-
ns
250
250
500
500
ns
rdbk.RIP delay
-
ns
High time
250
250
ns
TRCL
Low time
ns
Notes:
1. Timing parameters apply to all speed grades.
2. If rdbk.TRIG is High prior to Finished, Finished will trigger the first Readback.
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DS060 (v1.8) June 26, 2008
Product Specification
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