R
Virtex-II Platform FPGAs: DC and Switching Characteristics
JTAG Test Access Port Switching Characteristics
Characterization data for some of the most commonly requested timing parameters shown in Figure 6 is listed in Table 33.
FI
TMS
TDI
1
2
TTAPTCK TTCKTAP
TCK
TDO
3
TTCKTDO
Data Valid
Data to be captured
Data to be driven out
Data Valid
ds083-3_11_012104
Figure 6: Virtex-II Pro Boundary Scan Port Timing Waveforms
Table 33: Boundary-Scan Port Timing Specifications
Figure
Description
References
Symbol
TTAPTCK
TTCKTAP
TTCKTDO
FTCK
Value
5.5
Units
TMS and TDI setup time
1
2
3
ns, min
ns, min
TMS and TDI hold times
TCK
0.0
Falling edge to TDO output valid
10.0
33.0
ns, max
MHz, max
Maximum frequency
DS031-3 (v3.5) November 5, 2007
Product Specification
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