Pre-Production
WM8959
The dual Audio Interface approach of the WM8959 has been implemented in such a way that it gives
the user and application as much flexibility as possible, without any restrictions built into the
WM8959.
This means that the application has to be carefully analysed and the WM8959 configured
accordingly. In the following Figure 58 and Figure 59, the Audio Interface input flow and the output
controls are illustrated.
Figure 58 Audio Interface Input Flow
The Audio Interface input flow illustrated above is controlled only by the AIF_SEL register bit.
REGISTER
ADDRESS
BIT
13
LABEL
AIF_SEL
DEFAULT
DESCRIPTION
R8 (08h)
0b
Audio Interface Select
0 = Audio interface 1
1 = Audio interface 2 (GPIO3/BCLK2,
GPIO4/DACLRC2, GPIO5/DACDAT2)
Table 49 Audio Interface Pin Function Select
PP, May 2008, Rev 3.1
91
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