Production Data
WM8945
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R30 (1Eh)
DRC_NG_
Minimum gain the DRC can use to
attenuate audio signals when the
noise gate is active.
12:9
0110
DRC Control 2
MINGAIN [3:0]
0000 = -36dB
0001 = -30dB
0010 = -24dB
0011 = -18dB
0100 = -12dB
0101 = -6dB
0110 = 0dB
0111 = 6dB
1000 = 12dB
1001 = 18dB
1010 = 24dB
1011 = 30dB
1100 = 36dB
1101 to 1111 = Reserved
DRC_MINGAIN
[2:0]
Minimum gain the DRC can use to
attenuate audio signals
4:2
001
000 = 0dB
001 = -12dB (default)
010 = -18dB
011 = -24dB
100 = -36dB
101 = Reserved
11X = Reserved
DRC_MAXGAIN
[1:0]
Maximum gain the DRC can use to
boost audio signals (dB)
1:0
01
00 = 12dB
01 = 18dB
10 = 24dB
11 = 36dB
Table 18 DRC Gain Limits
GAIN READBACK
The gain applied by the DRC can be read from the DRC_GAIN register. This is a 16-bit, fixed-point
value, which expresses the DRC gain as a voltage multiplier.
DRC_GAIN is coded as a fixed-point quantity, with an MSB weighting of 64. The first 7 bits represent
the integer portion; the remaining bits represent the fractional portion. If desired, the value of this field
may be interpreted by treating DRC_GAIN as an integer value, and dividing the result by 512, as
illustrated in the following examples:
DRC_GAIN = 05D4 (hex) = 1380 (decimal)
Divide by 512 gives 2.914 voltage gain, or 4.645dB
DRC_GAIN = 0100 (hex) = 256 (decimal)
Divide by 512 gives 0.5 voltage gain, or -3.01dB
The DRC_GAIN register is defined in Table 19.
PD, May 2011, Rev 4.1
41
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