WM8945
Production Data
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
DRC Gain value.
R36 (24h)
DRC_GAIN
[15:0]
15:0
DRC Status
This is the DRC gain, expressed as
a voltage multiplier. Fixed point
coding, MSB = 64.
The first 7 bits are the integer
portion; the remaining bits are the
fractional part.
Table 19 DRC Gain Readback
DYNAMIC CHARACTERISTICS
The dynamic behaviour determines how quickly the DRC responds to changing signal levels. Note
that the DRC responds to the average (RMS) signal amplitude over a period of time.
The DRC_ATK determines how quickly the DRC gain decreases when the signal amplitude is high.
The DRC_DCY determines how quickly the DRC gain increases when the signal amplitude is low.
These register fields are described in Table 20. Note that the register defaults are suitable for general
purpose microphone use.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R31 (1Fh)
DRC_ATK [3:0]
Attack rate relative to input signal
(seconds/6dB)
7:4
0100
DRC Control 3
0000 = Reserved
0001 = 181us
0010 = 363us
0011 = 726us
0100 = 1.45ms
0101 = 2.9ms
0110 = 5.8ms
0111 = 11.6ms
1000 = 23.2ms
1001 = 46.4ms
1010 = 92.8ms
1011 = 185.6ms
1100-1111 = Reserved
DRC_DCY [3:0]
Decay rate relative to input signal
(seconds/6dB)
3:0
0010
0000 = 186ms
0001 = 372ms
0010 = 743ms
0011 = 1.49s
0100 = 2.97s
0101 = 5.94s
0110 = 11.89s
0111 = 23.78s
1000 = 47.56s
1001-1111 = Reserved
Table 20 DRC Time Constants
Under the following conditions, it is possible to predict the attack times with an input sine wave:
Decay rate is set at least 8 times the attack rate.
Attack time * input frequency > 1
PD, May 2011, Rev 4.1
42
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
