Production Data
WM8945
DIGITAL-TO-ANALOGUE CONVERTER (DAC)
The WM8945 DAC receives digital input data from the digital audio interface. (Note that, depending
on the DSP Configuration mode, the digital input may first be processed and filtered in the DSP
Core.) The digital audio data is converted to an oversampled bit-stream in the on-chip, true 24-bit
digital interpolation filter. The bit-stream data enters the multi-bit, sigma-delta DAC, which converts
them to high quality analogue audio.
The analogue output from the DAC can then be mixed with other analogue inputs before being sent to
the analogue output pins (see “Output Signal Path”).
The DAC is enabled by the DACL_ENA register bit.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
Right DAC Enable
R3 (03h)
DACR_ENA
0
1
Power
Management
2
0 = Disabled
1 = Enabled
DACR_ENA must be set to 1 when
processing right channel data from
the DAC or Digital Beep Generator.
DACL_ENA
0
Left DAC Enable
0 = Disabled
1 = Enabled
0
DACR_ENA must be set to 1 when
processing left channel data from
the DAC or Digital Beep Generator.
Table 23 DAC Enable Control
Note: The WM8945 will only function correctly in playback mode when the left and right DACs are
both enabled.
DAC DIGITAL VOLUME CONTROL
The output of the DACs can be digitally amplified or attenuated over a range from -71.625dB to
+23.625dB in 0.375dB steps. The volume of each channel can be controlled separately using
DACL_VOL. The DAC Volume is part of the DAC Digital Filters block. The gain for a given eight-bit
code X is given by:
0.375 (X-192) dB for 1 X 255;
MUTE for X = 0
The DAC_VU bit controls the loading of digital volume control data. The DACL_VOL control data is
only loaded into the respective control register when DAC_VU = 1.
The output of the DAC can be digitally muted using the DACL_MUTE or DAC_MUTEALL bits.
A digital soft-mute feature is provided in order to avoid sudden glitches in the analogue signal. When
DAC_VOL_RAMP is enabled, then all mute, un-mute or volume change commands are implemented
as a gradual volume change in the digital domain. The rate at which the volume ramps up is half of
the sample freq (fs/2). The DAC_VOL_RAMP register field is described in Table 24.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R21 (15h)
DAC_MUTEALL
1
DAC Digital Mute for All Channels:
0 = Disable Mute
8
DAC Control 1
1 = Enable Mute on all channels
DAC Volume Ramp control
0 = Disabled
R22 (16h)
DAC_VOL_RAMP
DAC_VU
1
0
0
4
12
8
DAC Control 2
1 = Enabled
R23 (17h)
DAC Volume Update
Left DAC
Digital Vol
Writing a 1 to this bit enables the
Left DAC volume to be updated
DACL_MUTE
Left DAC Digital Mute
0 = Disable Mute
1 = Enable Mute
PD, May 2011, Rev 4.1
45
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
