Production Data
WM8912
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R40 (28h)
DRC 0
15
DRC_ENA
0
DRC enable
1 = enabled
0 = disabled
DRC path select
0 = Reserved
1 = DAC path
14
DRC_DAC_PA
TH
0
12:11 DRC_GS_HYS
T_LVL [1:0]
00
Gain smoothing hysteresis threshold
00 = Low
01 = Medium (recommended)
10 = High
11 = Reserved
10:6
DRC_STARTU
P_GAIN [4:0]
0_0110
Initial gain at DRC startup
00000 = -3dB
00001 = -2.5dB
00010 = -2dB
00011 = -1.5dB
00100 = -1dB
00101 = -0.5dB
00110 = 0dB (default)
00111 = 0.5dB
01000 = 1dB
01001 = 1.5dB
01010 = 2dB
01011 = 2.5dB
01100 = 3dB
01101 = 3.5dB
01110 = 4dB
01111 = 4.5dB
10000 = 5dB
10001 = 5.5dB
10010 = 6dB
10011 to 11111 = Reserved
Feed-forward delay for anti-clip feature
0 = 5 samples
5
DRC_FF_DEL
AY
1
1 = 9 samples
Time delay can be calculated as 5/fs or 9/ fs, where fs
is the sample rate.
3
2
1
0
DRC_GS_ENA
DRC_QR
1
1
1
1
Gain smoothing enable
0 = disabled
1 = enabled
Quick release enable
0 = disabled
1 = enabled
DRC_ANTICLI
P
Anti-clip enable
0 = disabled
1 = enabled
DRC_GS_HYS
T
Gain smoothing hysteresis enable
0 = disabled
1 = enabled
Register 28h DRC 0
PD, Rev 4.0, September 2010
103
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
