Production Data
WM8912
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
Left Line Output Mute
REFER TO
R59 (3Bh)
Analogue
OUT2 Left
8
LINEOUTL_MU
TE
0
0 = Un-mute
1 = Mute
7
6
LINEOUT_VU
LINEOUTLZC
0
0
Line Output Volume Update
Writing a 1 to this bit will update LINEOUTL and
LINEOUTR volumes simultaneously.
Left Line Output Zero Cross Enable
0 = disabled
1 = enabled
5:0
LINEOUTL_VO 11_1001 Left Line Output Volume
L [5:0]
000000 = -57dB
000001 = -56dB
(… 1dB steps)
111001 = 0dB
(… 1dB steps)
111110 = +5dB
111111 = +6dB
Register 3Bh Analogue OUT2 Left
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R60 (3Ch)
Analogue
OUT2 Right
8
LINEOUTR_M
UTE
0
Right Line Output Mute
0 = Un-mute
1 = Mute
7
6
LINEOUT_VU
LINEOUTRZC
0
0
Line Output Volume Update
Writing a 1 to this bit will update LINEOUTL and
LINEOUTR volumes simultaneously.
Right Line Output Zero Cross Enable
0 = disabled
1 = enabled
5:0
LINEOUTR_V
OL [5:0]
11_1001 Right Line Output Volume
000000 = -57dB
000001 = -56dB
(… 1dB steps)
111001 = 0dB
(… 1dB steps)
111110 = +5dB
111111 = +6dB
Register 3Ch Analogue OUT2 Right
PD, Rev 4.0, September 2010
107
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