Pre-Production
WM8904
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R94 (5Eh)
Removes LINEOUTL short
0 = LINEOUTL short enabled
1 = LINEOUTL short removed
7
LINEOUTL_RMV_
SHORT
0
Analogue
Lineout 0
For normal operation, this bit should
be set as the final step of the
LINEOUTL Enable sequence.
Enables LINEOUTL output stage
0 = Disabled
6
5
LINEOUTL_ENA_
OUTP
0
0
1 = Enabled
For normal operation, this bit should
be set to 1 after the DC offset
cancellation has been scheduled.
Enables LINEOUTL intermediate
stage
LINEOUTL_ENA_
DLY
0 = Disabled
1 = Enabled
For normal operation, this bit should
be set to 1 after the output signal path
has been configured, and before DC
offset cancellation is scheduled. This
bit should be set with at least 20us
delay after LINEOUTL_ENA.
Enables LINEOUTL input stage
0 = Disabled
4
3
2
1
LINEOUTL_ENA
0
0
0
0
1 = Enabled
For normal operation, this bit should
be set as the first step of the
LINEOUTL Enable sequence.
Removes LINEOUTR short
0 = LINEOUTR short enabled
1 = LINEOUTR short removed
LINEOUTR_RMV
_SHORT
For normal operation, this bit should
be set as the final step of the
LINEOUTR Enable sequence.
Enables LINEOUTR output stage
0 = Disabled
LINEOUTR_ENA_
OUTP
1 = Enabled
For normal operation, this bit should
be set to 1 after the DC offset
cancellation has been scheduled.
Enables LINEOUTR intermediate
stage
LINEOUTR_ENA_
DLY
0 = Disabled
1 = Enabled
For normal operation, this bit should
be set to 1 after the output signal path
has been configured, and before DC
offset cancellation is scheduled. This
bit should be set with at least 20us
delay after LINEOUTR_ENA.
Enables LINEOUTR input stage
0 = Disabled
0
LINEOUTR_ENA
0
1 = Enabled
For normal operation, this bit should
be set as the first step of the
LINEOUTR Enable sequence.
Table 43 Headphone / Line Output Pop Suppression Control
PP, Rev 3.3, September 2012
75
w