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WM8904CGEFL/V 参数 Datasheet PDF下载

WM8904CGEFL/V图片预览
型号: WM8904CGEFL/V
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功耗编解码器用于便携式音频应用 [Ultra Low Power CODEC for Portable Audio Applications]
分类和应用: 解码器编解码器电信集成电路便携式PC
文件页数/大小: 188 页 / 1824 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8904  
Pre-Production  
OUTPUT SIGNAL PATHS ENABLE  
The output PGAs for each analogue output pin can be enabled and disabled using the register bits  
described in Table 40.  
Note that the Headphone Outputs and Line Outputs are also controlled by fields located within  
Register R90 and R94, which provide suppression of pops & clicks when enabling and disabling  
these signal paths. These registers are described in the following “Headphone / Line Output Signal  
Paths Enable” section.  
Under recommended usage conditions, all the control bits associated with enabling the Headphone  
Outputs and the Line Outputs will be configured by scheduling the default Start-Up and Shutdown  
sequences as described in the “Control Write Sequencer” section. In these cases, the user does not  
need to set the register fields in R14, R15, R90 and R94 directly.  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
R14 (0Eh)  
Left Headphone Output Enable  
0 = disabled  
1
HPL_PGA_ENA  
0
Power  
Management 2  
1 = enabled  
Right Headphone Output Enable  
0 = disabled  
0
1
0
HPR_PGA_ENA  
0
0
0
1 = enabled  
R15 (0Fh)  
Left Line Output Enable  
0 = disabled  
LINEOUTL_PGA_  
ENA  
Power  
Management 3  
1 = enabled  
Right Line Output Enable  
0 = disabled  
LINEOUTR_PGA  
_ENA  
1 = enabled  
Table 40 Output Signal Paths Enable  
To enable the output PGAs and multiplexers, the reference voltage VMID and the bias current must  
also be enabled. See “Reference Voltages and Master Bias” for details of the associated controls  
VMID_RES and BIAS_ENA.  
HEADPHONE / LINE OUTPUT SIGNAL PATHS ENABLE  
The output paths can be actively discharged to AGND through internal resistors if desired. This is  
desirable at start-up in order to achieve a known output stage condition prior to enabling the VMID  
reference voltage. This is also desirable in shutdown to prevent the external connections from being  
affected by the internal circuits. The ground-referenced Headphone outputs and Line outputs are  
shorted to AGND by default; the short circuit is removed on each of these paths by setting the  
applicable fields HPL_RMV_SHORT, HPR_RMV_SHORT, LINEOUTL_RMV_SHORT or  
LINEOUTR_RMV_SHORT.  
The ground-referenced Headphone output and Line output drivers are designed to suppress pops  
and clicks when enabled or disabled. However, it is necessary to control the drivers in accordance  
with a defined sequence in start-up and shutdown to achieve the pop suppression. It is also  
necessary to schedule the DC Servo offset correction at the appropriate point in the sequence (see  
“DC Servo”). Table 41 and Table 42 describe the recommended sequences for enabling and  
disabling these output drivers.  
PP, Rev 3.3, September 2012  
72  
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