Production Data
WM8805
REGISTER MAP
The complete register map is shown below. The detailed description can be found in the relevant text of the device description. The
WM8805 can be configured using the Control Interface. Any unused bits which are not specified should be set to ‘0’. Not all
registers can be read. Only the device ID (registers R0, R1 and R2) and the status registers can be read. These status registers
are labelled as “read only”.
ADDRESS
REGISTER
R0
NAME
[0:7]
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
11
12
13
14
15
16
17
18
19
1A
1B
1C
1D
1E
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
-
RST/DEVID
1
write: RESET read: DEVICEID[7:0]
R1
DEVID2
DEVREV
PLL1
DEVICEID[15:8]
0
read only
read only
00100001
11111101
00110110
00000111
00010110
00011000
11111111
00000000
read only
read only
read only
read only
read only
read only
read only
00000000
00000000
00000000
01110001
00001011
01110000
01010111
00110110
01000010
00000110
00000110
10000000
00000111
R2
0
0
0
DEVREV[3:0]
R3
PLL_K[7:0]
PLL_K[15:8]
R4
PLL2
R5
PLL3
0
0
PLL_K[21:16]
TXVAL_
OVWR
R6
PLL4
TXVAL_SF1
0
TXVAL_SF0
PRESCALE
CLKOUTDIS
PLL_N[3:0]
FRACEN
R7
PLL5
0
CLKOUTDIV[1:0]
MCLKDIV
FREQMODE[1:0]
RXINSEL[2:0]
R8
PLL6
MCLKSRC
ALWAYSVALID
FILLMODE
CLKOUTSRC
R9
SPDMODE
INTMASK
INTSTAT
SPDSTAT
RXCHAN1
RXCHAN2
RXCHAN3
RXCHAN4
RXCHAN5
SPDTX1
SPDTX2
SPDTX3
SPDTX4
SPDTX5
GPO01
SPDIFINMODE[7:0]
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
R26
R27
R28
R29
R30
MASK[7:0]
Interrupt Status
S/PDIF Status
RX Channel Info 1
RX Channel Info 2
RX Channel Info 3
RX Channel Info 4
RX Channel Info 5
CHSTMODE[1:0]
DEEMPH[2:0]
CATCODE[7:0]
CPY_N
AUDIO_N
CON/PRO
CHNUM2[1:0]
TXSTATSRC TXSRC
ORGSAMP[3:0]
CHNUM1[1:0]
CLKACU[1:0]
SRCNUM[3:0]
FREQ[3:0]
TXWL[2:0]
MAXWL
GPO1[3:0]
GPO3[3:0]
GPO5[3:0]
GPO7[3:0]
GPO0[3:0]
GPO2[3:0]
GPO4[3:0]
GPO6[3:0]
GPO23
GPO45
GPO67
AIFTX
0
0
AIFTX_LRP
AIFTX_BCP
AIFTX_WL[1:0]
AIFRX_WL[1:0]
AIFTX_FMT[1:0]
AIFRX_FMT[1:0]
READMUX[2:0]
SPDIFRXPD
AIFRX
0
AIF_MS
WL_MASK
0
AIFRX_LRP
SPDGPO
TRIOP
AIFRX_BCP
WITHFLAG
AIFPD
SPDRX1
PWRDN
SPD_192K_EN
0
CONT
OSCPD
SPDIFTXPD
PLLPD
Table 57 WM8805 Register Map
PD Rev 4.1 September 07
53
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
