WM8777
Product Preview
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
Surround Right output powerdown.
3
SURRPD
1
0 = powerup
1 = powerdown
4
5
6
7
8
LFEPD
CTRPD
FRTLPD
FRTRPD
HPPD
1
1
1
1
1
LFE output powerdown.
0 = powerup
1 = powerdown
Center output powerdown.
0 = powerup
1 = powerdown
Front Left output powerdown.
0 = powerup
1 = powerdown
Front Right output powerdown.
0 = powerup
1 = powerdown
Headphone output powerdown.
0 = powerup
1 = powerdown
0101110
(2Eh)
7:0
8
LAG[7:0]
ZCLEN
11001111
(0dB)
0
Attenuation control for left channel ADC gain in 0.5dB steps. See
Table 68
Attenuation
ADC Left
Zero Cross enable for left channel ADC
0 = Disable Zero Cross
1 = Enable Zero Cross
0101111
(2Fh)
7:0
8
RAG[7:0]
ZCREN
11001111
(0dB)
0
Attenuation control for right channel ADC gain in 0.5dB steps.
See Table 68
Attenuation
ADC Right
Zero Cross enable for right channel ADC
0 = Disable Zero Cross
1 = Enable Zero Cross
0110000
(30h)
0
1
2
3
MUTEL
MUTER
ADCATC
TOADC
0
0
0
0
Left Channel mute control
0 = Channel not muted
Attenuation
Control
1 = Channel muted
Left Channel mute control
0 = Channel not muted
1 = Channel muted
Attenuator Control
0 = ADC use attenuations as programmed.
1 = Right channel ADC use corresponding left ADC attenuations
Time out clock enable/disable
0 = Time out clock enabled.
1 = Time out clock disabled.
PP Rev 1.94 November 2004
86
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
