WM8777
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REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0011110
(1Eh)
3:0
HLD[3:0]
0000
ALC hold time before gain is increased.
0000 = 0ms
(0MS)
ALC Control 2
0001 = 2.67ms
0010 = 5.33ms
… (time doubles with every step)
1111 = 43.691s
7
8
ALCZC
LCEN
0
0
ALC zero cross detection circuit.
0 = Zero cross detection disabled.
1 = Zero cross detection enabled.
Enable the PGA gain control circuit.
0 = PGA gain control disabled
1 = PGA gain control enabled
ALC/Limiter attack (gain ramp down) time
0011111
(1Fh)
3:0
ATK[3:0]
0010
(33ms/1ms)
ACL mode
Limiter mode
0000 = 250us
ALC Control 3
0000 = 8.4ms
0001 = 16.8ms
0001 = 500us
0010 = 33.6ms..
(time doubles with every step)
1010 or higher = 8.6s
0010 = 1ms
(time doubles with every step)
1010 or higher = 256ms
7:4
DCY[3:0]
0011
ALC/Limiter decay (gain ramp up) time
ACL mode
Limiter mode
0000 = 33.5ms
0000 = 1.2ms
0001 = 67.2ms
0001 = 2.4ms
0010 = 134.4ms..
(time doubles with every step)
1010 or higher = 34.41s
0010 = 4.8ms
(time doubles with every step)
1010 or higher = 1.2288s
8
FDECAY
0
Frequency dependant decay enable (Limiter only)
0 = Frequency dependent decay disabled
1 = Frequency dependent decay enabled
DCY
0000
0001
0010
…..
20KHz input (or disabled) 1KHz input
1.2ms
2.4ms
4.8ms
…..
24ms
48ms
96ms
…..
1010 or higher 1.2288s
24.576s
0100000
(20h)
0
NGAT
0
Noise gate enable (ALC only)
0 = Noise gate disabled
1 = Noise gate enabled
Noise gate threshold
000 = -78dBFS
Noise Gate
Control
4:2
NGTH[2:0]
000
001 = -72dBfs
… 6 dB steps
110 = -42dBFS
111 = -36dBFS
0100001
(21h)
3:0
MAXATTEN
[3:0]
0110
Maximum attenuation of PGA
ALC
Limiter
Limiter
Control
(lower PGA gain limit)
1010 or lower = -1dB
1011 = -5dB
(attenuation below static)
0000 = -3dB
0001 = -4dB
…… (-4dB steps)
1110 = -17dB
0010 = -5dB
…. (-1dB steps)
1001 = -12dB
1111 = -21dB
PP Rev 1.94 November 2004
82
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
