Production Data
WM8776
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R12 (0Ch)
0001100
2:0
ADCRATE[2:0]
010
Master Mode ADCMCLK:ADCLRC ratio select:
010: 256fs
Master Mode
Control
011: 384fs
100: 512fs
3
ADCOSR
0
ADC oversample rate select
0: 128x oversampling
1: 64x oversapmling
6:4
DACRATE[2:0]
010
Master Mode DACMCLK:DACLRC ratio select:
000: 128fs
001: 192fs
010: 256fs
011: 384fs
100: 512fs
7
8
0
DACMS
ADCMS
PDWN
0
0
0
DAC Maser/Slave interface mode select
0: Slave Mode – DACLRC and DACBCLK are inputs
1: Master Mode –DACLRC and DACBCLK are outputs
ADC Maser/Slave interface mode select
0: Slave Mode – ADCLRC and ADCBCLK are inputs
1: Master Mode – ADCLRC and ADCBCLK are outputs
R13 (0Dh)
0001101
Chip Powerdown Control (works in tandem with ADCD and
DACD):
0: All circuits running, outputs are active
1: All circuits in power save mode, outputs muted
ADC powerdown:
PWR Down
Control
1
2
ADCPD
DACPD
HPPD
0
0
1
0
0: ADC enabled
1: ADC disabled
DAC powerdown
0: DAC enabled
1: DAC disabled
3
Headphone Output/PGA’s powerdown
0: Headphone out enabled
1: Headphone out disabled
AINPD powerdown
6
AINPD
0: ANALOGUE INPUT enabled
1: ANALOGUE INPUT disabled
Attenuation data for left channel ADC gain in 0.5dB steps.
00000000 : digital mute
00000001 : -103dB
R14 (0Eh)
0001110
7:0
LAG[7:0]
11001111
(0dB)
Attenuation
ADCL
………..
11001111 : 0dB
…………
11111110 : +23.5dB
11111111 : +24dB
8
ZCLA
0
Left ADC zero cross enable:
0: Zero cross disabled
1: Zero cross enabled
PD Rev 4.0 April 2005
45
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
