Production Data
WM8776
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R18 (12h)
0011000
3:0
ATK[3:0]
0010
ALC/Limiter attack (gain ramp-down) time
(33ms/1ms)
ALC mode
Limiter Mode
ALC Control 3
0000: 8.4ms
0000: 250us
0001: 500us…
0010: 1ms
0001: 16.8ms
0010: 33.6ms…
(time doubles with every step)
1010 or higher: 8.6s
(time doubles with every step)
1010 or higher: 256ms
7:4
DCY[3:0]
0011
(268ms/
9.6ms)
ALC/Limiter decay (gain ramp up) time
ALC mode
Limiter mode
0000: 33.5ms
0001: 67.2ms
0000: 1.2ms
0001: 2.4ms
0010: 134.4ms ….(time
doubles for every step)
0010: 4.8ms ….(time doubles
for every step)
1010 or higher: 34.3ms
1010 or higher: 1.2288s
R19 (13h)
0010011
0
NGAT
0
Noise gate enable (ALC only)
0 : disabled
Noise Gate
Control
1 : enabled
4:2
NGTH [2:0]
000
Noise gate threshold
000: -78dBFS
001: -72dBfs
… 6 dB steps
110: -42dBFS
111: -36dBFS
R20 (14h)
0010100
3:0
MAXATTEN
[3:0]
0110
Maximum attenuation of PGA
Limiter (attenuation below
static)
ALC (lower PGA gain limit)
1010 or lower: -1dB
1011 : -5dB
Limiter
Control
0011 or lower: -3dB
0100: -4dB
….. (-4dB steps)
1110 : -17dB
…. (-1dB steps)
1100 or higher: -12dB
1111 : -21dB
6:4
4:0
TRANWIN [2:0]
010
Length of Transient Window
000: 0us (disabled)
001: 62.5us
010: 125us
…..
111: 4ms
R21 (15h)
0010101
AMX[4:0]
00001
ADC left channel input mixer control bit
ADC Mux
Control
AMX[4:0]
00001
00010
00100
01000
10000
ADC LEFT IN
AIN1L
ADC RIGHT IN
AIN1R
AIN2L
AIN2L
AIN3L
AIN3R
AIN4L
AIN4R
AIN5L
AIN5R
6
7
MUTERA
MUTELA
0
0
Mute for right channel ADC
0: Mute off
1: Mute on
Mute for left channel ADC
0: Mute off
1: Mute on
PD Rev 4.0 April 2005
47
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
