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WM8771FTV 参数 Datasheet PDF下载

WM8771FTV图片预览
型号: WM8771FTV
PDF下载: 下载PDF文件 查看货源
内容描述: [24-bit, 192kHz 8-Channel Codec]
分类和应用:
文件页数/大小: 44 页 / 336 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8771  
Product Preview  
01001  
7:0  
8
LDA1[7:0]  
UPDATE  
11111111  
(0dB)  
Digital Attenuation data for Left channel DACL1 in 0.5dB steps.  
See Table 10  
Digital  
Attenuation  
DACL1  
Not latched  
Controls simultaneous update of all Attenuation Latches  
0: Store LDA1 in intermediate latch (no change to output)  
1: Store LDA1 and update attenuation on all channels  
01010  
7:0  
8
RDA1[6:0]  
UPDATE  
11111111  
(0dB)  
Digital Attenuation data for Right channel DACR1 in 0.5dB steps.  
See Table 10  
Digital  
Attenuation  
DACR1  
Not latched  
Controls simultaneous update of all Attenuation Latches  
0: Store RDA1 in intermediate latch (no change to output)  
1: Store RDA1 and update attenuation on all channels.  
01011  
7:0  
8
LDA2[7:0]  
UPDATE  
11111111  
(0dB)  
Digital Attenuation data for Left channel DACL2 in 0.5dB steps.  
See Table 10  
Digital  
Attenuation  
DACL2  
Not latched  
Controls simultaneous update of all Attenuation Latches  
0: Store LDA2 in intermediate latch (no change to output)  
1: Store LDA2 and update attenuation on all channels.  
01100  
7:0  
8
RDA2[7:0]  
UPDATE  
11111111  
(0dB)  
Digital Attenuation data for Right channel DACR2 in 0.5dB steps.  
See Table 10  
Digital  
Attenuation  
DACR2  
Not latched  
Controls simultaneous update of all Attenuation Latches  
0: Store RDA2 in intermediate latch (no change to output)  
1: Store RDA2 and update attenuation on all channels.  
01101  
7:0  
8
LDA3[7:0]  
UPDATE  
11111111  
(0dB)  
Digital Attenuation data for Left channel DACL3 in 0.5dB steps.  
See Table 10  
Digital  
Attenuation  
DACL3  
Not latched  
Controls simultaneous update of all Attenuation Latches  
0: Store LDA3 in intermediate latch (no change to output)  
1: Store LDA3 and update attenuation on all channels.  
01110  
7:0  
8
RDA3[7:0]  
UPDATE  
11111111  
(0dB)  
Digital Attenuation data for Right channel DACR3 in 0.5dB steps.  
See Table 10  
Digital  
Attenuation  
DACR3  
Not latched  
Controls simultaneous update of all Attenuation Latches  
0: Store RDA3 in intermediate latch (no change to output)  
1: Store RDA3 and update attenuation on all channels.  
01111  
7:0  
8
LDA4[7:0]  
UPDATE  
11111111  
(0dB)  
Digital Attenuation data for Left channel DACL4 in 0.5dB steps.  
See Table 10  
Digital  
Attenuation  
DACL4  
Not latched  
Controls simultaneous update of all Attenuation Latches  
0: Store LDA4 in intermediate latch (no change to output)  
1: Store LDA4 and update attenuation on all channels.  
10000  
7:0  
8
RDA4[7:0]  
UPDATE  
11111111  
(0dB)  
Digital Attenuation data for Right channel DACR4 in 0.5dB steps.  
See Table 10  
Digital  
Attenuation  
DACR4  
Not latched  
Controls simultaneous update of all Attenuation Latches  
0: Store RDA4 in intermediate latch (no change to output)  
1: Store RDA4 and update attenuation on all channels.  
10001  
7:0  
8
MASTDA[7:0]  
UPDATE  
11111111  
(0dB)  
Digital Attenuation data for all DAC channels in 0.5dB steps. See  
Table 10  
Master  
Digital  
Attenuation  
Not latched  
Controls simultaneous update of all Attenuation Latches  
0: Store gain in intermediate latch (no change to output)  
1: Store gain and update attenuation on all channels.  
(all channels)  
PP Rev 2.0 December 2001  
34  
w
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