WM8750JL
Production Data
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
00
DESCRIPTION
R25 (19h)
8:7
VMIDSEL
Vmid divider enable and select
Power
00 – Vmid disabled (for OFF mode)
Management
(1)
01 – 50k divider enabled (for
playback/record)
10 – 500k divider enabled (for low-power
standby)
11 – 5k divider enabled (for fast start-up)
VREF (necessary for all other functions)
0 = Power down
1 = Power up
6
5
4
3
2
1
8
7
6
5
4
3
2
1
VREF
AINL
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Analogue in PGA Left
0 = Power down
1 = Power up
AINR
Analogue in PGA Right
0 = Power down
1 = Power up
ADCL
ADCR
MICB
ADC Left
0 = Power down
1 = Power up
ADC Right
0 = Power down
1 = Power up
MICBIAS
0 = Power down
1 = Power up
R26 (1Ah)
DACL
DACR
LOUT1
ROUT1
LOUT2
ROUT2
MONO
OUT3
DAC Left
Power
Management
(2)
0 = Power down
1 = Power up
DAC Right
0 = Power down
1 = Power up
LOUT1 Output Buffer*
0 = Power down
1 = Power up
ROUT1 Output Buffer*
0 = Power down
1 = Power up
LOUT2 Output Buffer*
0 = Power down
1 = Power up
ROUT2 Output Buffer*
0 = Power down
1 = Power up
MONOOUT Output Buffer and Mono Mixer
0 = Power down
1 = Power up
OUT3 Output Buffer
0 = Power down
1 = Power up
* The left mixer is enabled when LOUT1=1 or LOUT2=1. The right mixer is enabled when
ROUT1=1 or ROUT2=1.
Table 43 Power Management
PD, April 2012, Rev 4.1
w
48
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
