Production Data
WM8750JL
The WM8750JL has two possible device addresses, which can be selected using the CSB pin.
CSB STATE
Low
DEVICE ADDRESS
0011010 (0 x 34h)
0011011 (0 x 36h)
High
Table 42 2-Wire MPU Interface Address Selection
POWER SUPPLIES
The WM8750JL can use up to four separate power supplies:
AVDD / AGND: Analogue supply, powers all analogue functions except the headphone drivers.
AVDD can range from 1.8V to 3.6V and has the most significant impact on overall power
consumption (except for power consumed in the headphone). A large AVDD slightly improves
audio quality.
HPVDD / HPGND: Headphone supply, powers the headphone drivers. HPVDD is normally tied
to AVDD, but it requires separate layout and decoupling capacitors to curb harmonic distortion.
If HPVDD is lower than AVDD, the output signal may be clipped.
DCVDD: Digital core supply, powers all digital functions except the audio and control interfaces.
DCVDD can range from 1.42V to 3.6V, and has no effect on audio quality. The return path for
DCVDD is DGND, which is shared with DBVDD.
DBVDD: Digital buffer supply, powers the audio and control interface buffers. This makes it
possible to run the digital core at very low voltages, saving power, while interfacing to other
digital devices using a higher voltage. DBVDD draws much less power than DCVDD, and has
no effect on audio quality. DBVDD can range from 1.8V to 3.6V. The return path for DBVDD is
DGND, which is shared with DCVDD.
It is possible to use the same supply voltage on all four. However, digital and analogue supplies
should be routed and decoupled separately to keep digital switching noise out of the analogue signal
paths.
POWER MANAGEMENT
The WM8750JL has two control registers that allow users to select which functions are active. For
minimum power consumption, unused functions should be disabled. To avoid any pop or click noise,
it is important to enable or disable functions in the correct order (see Applications Information).
VMIDSEL is the enable for the Vmid reference, which defaults to disabled and can be enabled as a
50k potential divider or, for low power maintenance of Vref when all other blocks are disabled, as a
500k potential divider.
PD, April 2012, Rev 4.1
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
