WM8746
Production Data
DIGITAL CONTROL INTERFACE
tMLL
tMLH
ML/I2S
tMCY
tMCH
tCSS
tSCS
tMCL
MC/IWL
MD/DM
LSB
tDSU
tDHO
Figure 3 Control Interface Input Timing: 3-Wire Serial Control Mode
Test Conditions
AVDD = DVDD = 5V, AGND = GR = DGND = 0V, TA = +25oC, fs = 48kHz, SCKI = 256fs unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Program Register Input Information
MC/IWL rising edge to ML/I2S
rising edge
tSCS
20
ns
MC/IWL pulse cycle time
MC/IWL pulse width low
MC/IWL pulse width high
MD/DM to MC/IWL set-up time
MC/IWL to MD/DM hold time
ML/I2S pulse width low
tMCY
tMCL
tMCH
tDSU
tDHO
tMLL
tMLH
tCSS
80
30
30
20
20
20
20
20
ns
ns
ns
ns
ns
ns
ns
ns
ML/I2S pulse width high
ML/I2S rising to MC/IWL rising
Table 3 Control Interface Input Timing Information: 3-Wire Serial Control Mode
March 2006, PD Rev 4.0
9
w