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WM8580_07_12 参数 Datasheet PDF下载

WM8580_07_12图片预览
型号: WM8580_07_12
PDF下载: 下载PDF文件 查看货源
内容描述: 多通道编解码器S / PDIF收发器 [Multichannel CODEC with S/PDIF Transceiver]
分类和应用: 解码器编解码器光电二极管
文件页数/大小: 97 页 / 1142 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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Production Data  
WM8580  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
R13  
PAIF 4  
0Dh  
1:0  
PAIFTXFMT  
[1:0]  
10  
PAIF Transmitter Audio Data Format  
Select  
11: DSP Format  
10: I2S Format  
01: Left justified  
00: Right justified  
3:2  
PAIFTXWL  
[1:0]  
10  
PAIF Transmitter Audio Data Word  
Length  
11: 32 bits (see Note 1,2)  
10: 24 bits  
01: 20 bits  
00: 16 bits  
4
PAIFTXLRP  
0
In LJ/RJ/I2S modes  
0 = LRCLK not inverted  
1 = LRCLK inverted  
In DSP Format:  
0 = DSP Mode A  
1 = DSP Mode B  
PAIF Receiver BCLK polarity  
0 = BCLK not inverted  
1 = BCLK inverted  
SAIF Audio Data Format Select  
11: DSP Format  
5
PAIFTXBCP  
0
R14  
SAIF 2  
0Eh  
1:0  
SAIFFMT  
[1:0]  
10  
10: I2S Format  
01: Left justified  
00: Right justified  
SAIF Audio Data Word Length  
11: 32 bits (see Note 1,2)  
10: 24 bits  
3:2  
SAIFWL  
[1:0]  
10  
01: 20 bits  
00: 16 bits  
4
SAIFLRP  
0
In LJ/RJ/I2S modes  
0 = LRCLK not inverted  
1 = LRCLK inverted  
In DSP Format:  
0 = DSP Mode A  
1 = DSP Mode B  
SAIF BCLK polarity  
0 = BCLK not inverted  
1 = BCLK inverted  
SAIF Enable  
5
6
SAIFBCP  
SAIF_EN  
0
0
0 = SAIF disabled  
1 = SAIF enabled  
Table 16 Audio Interface Control  
Notes  
1. Right Justified mode does not support 32-bit data. If word length xAIFxxWL=11b in Right  
Justified mode, the word length is forced to 24 bits.  
In all modes, the data is signed 2's complement. The digital filters internal signal paths process  
24-bit data. If the device is programmed to receive 16 or 20 bit data, the device pads the unused  
LSBs with zeros. If the device is programmed into 32 bit mode, the 8 LSBs are ignored.  
PD Rev 4.3 August 2007  
29  
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