Production Data
WM8352
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R115 (73h)
AI DAC
14
BCLK_MSTR
0
Enables the Audio Interface BCLK generation
and enables the BCLK pin for Master mode
Control
0 = BCLK Slave mode
1 = BCLK Master mode
7
6
AIFDAC_PD
DACL_SRC
0
0
Enables a pull down on DAC data pin
0 = disabled
1 = enabled
Selects Left channel DAC input.
0 = DAC Left channel
1 = DAC Right channel
5
DACR_SRC
1
Selects Right channel DAC input.
0 = DAC Left channel
1 = DAC Right channel
4
AIFDAC_TDM_CHAN
AIFDAC_TDM
0
DACDAT TDM Channel Select
0 = DACDAT outputs data on slot 0
1 = DACDAT outputs data on slot 1
DAC TDM Enable
3
0
0 = Normal DACDAT operation
1 = TDM enabled on DACDAT
1:0
DAC_BOOST[1:0]
00
Provides a limited set of gains to be applied to
the signal
00 = 0dB
01 = +6dB
10 = +12dB
11 = Reserved (+18dB)
Register 73h AI DAC Control
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R128 (80h)
GPIO
Debounce
12
GP12_DB
1
1
1
1
1
1
GPIO12 debounce
0 = GPIO is not debounced.
1 = GPIO is debounced (time from GP_DBTIME[1:0])
Reset by state machine.
11
10
9
GP11_DB
GP10_DB
GP9_DB
GP8_DB
GP7_DB
GPIO11 debounce
0 = GPIO is not debounced.
1 = GPIO is debounced (time from GP_DBTIME[1:0])
Reset by state machine.
GPIO10 debounce
0 = GPIO is not debounced.
1 = GPIO is debounced (time from GP_DBTIME[1:0])
Reset by state machine.
GPIO9 debounce
0 = GPIO is not debounced.
1 = GPIO is debounced (time from GP_DBTIME[1:0])
Reset by state machine.
8
GPIO8 debounce
0 = GPIO is not debounced.
1 = GPIO is debounced (time from GP_DBTIME[1:0])
Reset by state machine.
7
GPIO7 debounce
0 = GPIO is not debounced.
1 = GPIO is debounced (time from GP_DBTIME[1:0])
Reset by state machine.
PD, February 2011, Rev 4.4
263
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
