Production Data
WM8321
The sequence of signals associated with a single register write operation is illustrated in Figure 7.
Figure 7 Control Interface 2-wire (I2C) Register Write
The sequence of signals associated with a single register read operation is illustrated in Figure 8.
Figure 8 Control Interface 2-wire (I2C) Register Read
The Control Interface also supports other register operations, as listed above. The interface protocol
for these operations is summarised below. The terminology used in the following figures is detailed in
Table 11.
Note that, for multiple write and multiple read operations, the auto-increment option must be enabled.
This feature is enabled by default; it is described in Table 12 below.
TERMINOLOGY
DESCRIPTION
Start Condition
S
Sr
Repeated start
A
Acknowledge (SDA Low)
Not Acknowledge (SDA High)
Stop Condition
¯A¯
P
R/¯W¯
ReadNotWrite
0 = Write
1 = Read
[White field]
[Grey field]
Data flow from bus master to WM8321
Data flow from WM8321 to bus master
Table 11 Control Interface Terminology
Figure 9 Single Register Write to Specified Address
PD, February 2012, Rev 4.0
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
