欢迎访问ic37.com |
会员登录 免费注册
发布采购

W9412G6JH-5 参数 Datasheet PDF下载

W9412G6JH-5图片预览
型号: W9412G6JH-5
PDF下载: 下载PDF文件 查看货源
内容描述: 双倍数据速率的架构;每个时钟周期2的数据传输 [Double Data Rate architecture; two data transfers per clock cycle]
分类和应用: 存储内存集成电路光电二极管动态存储器双倍数据速率数据传输时钟
文件页数/大小: 53 页 / 1006 K
品牌: WINBOND [ WINBOND ]
 浏览型号W9412G6JH-5的Datasheet PDF文件第1页浏览型号W9412G6JH-5的Datasheet PDF文件第2页浏览型号W9412G6JH-5的Datasheet PDF文件第4页浏览型号W9412G6JH-5的Datasheet PDF文件第5页浏览型号W9412G6JH-5的Datasheet PDF文件第6页浏览型号W9412G6JH-5的Datasheet PDF文件第7页浏览型号W9412G6JH-5的Datasheet PDF文件第8页浏览型号W9412G6JH-5的Datasheet PDF文件第9页  
W9412G6JH  
11.7 Extend Mode Register Set (EMRS) Timing.................................................................. 40  
11.8 Auto-precharge Timing (Read Cycle, CL = 2) .............................................................. 41  
11.9 Auto-precharge Timing (Read cycle, CL = 2), continued ............................................. 42  
11.10 Auto-precharge Timing (Write Cycle).......................................................................... 43  
11.11 Read Interrupted by Read (CL = 2, BL = 2, 4, 8) ........................................................ 44  
11.12 Burst Read Stop (BL = 8) ............................................................................................ 44  
11.13 Read Interrupted by Write & BST (BL = 8).................................................................. 45  
11.14 Read Interrupted by Precharge (BL = 8)..................................................................... 45  
11.15 Write Interrupted by Write (BL = 2, 4, 8) ..................................................................... 46  
11.16 Write Interrupted by Read (CL = 2, BL = 8) ................................................................ 46  
11.17 Write Interrupted by Read (CL = 3, BL = 4) ................................................................ 47  
11.18 Write Interrupted by Precharge (BL = 8) ..................................................................... 47  
11.19 2 Bank Interleave Read Operation (CL = 2, BL = 2) ................................................... 48  
11.20 2 Bank Interleave Read Operation (CL = 2, BL = 4) ................................................... 48  
11.21 4 Bank Interleave Read Operation (CL = 2, BL = 2) ................................................... 49  
11.22 4 Bank Interleave Read Operation (CL = 2, BL = 4) ................................................... 49  
11.23 Auto Refresh Cycle ..................................................................................................... 50  
11.24 Precharged/Active Power Down Mode Entry and Exit Timing.................................... 50  
11.25 Input Clock Frequency Change during Precharge Power Down Mode Timing .......... 50  
11.26 Self Refresh Entry and Exit Timing ............................................................................. 51  
Package Specification............................................................................................................... 52  
12.1 TSOP (TYPE II) 66L 400 mil......................................................................................... 52  
REVISION HISTORY................................................................................................................ 53  
12.  
13.  
Publication Release Date: Nov. 29, 2011  
- 3 -  
Revision A03  
 复制成功!