W90N745CD/W90N745CDG
11
Name
10
01
00
PT5CFG11
Type
Name
Type
Name
nIRQ0
Type
I
Name
GPIO16
Type
I/O
PORT5_11
RESERVED
RESERVED
11
10
01
00
PT5CFG12
Name
Type
Name
USBOVCUR
Type
I
Name
nIRQ1
Type
I
Name
Type
I/O
PORT5_12
RESERVED
GPIO17
GPIO Port5 Direction Register (GPIO_DIR5)
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET VALUE
GPIO port5 in/out direction control
and pull-up enable register
GPIO_DIR5
0xFFF8_3054
R/W
0x0000_0000
31
30
RESERVED
29
21
13
5
28
20
27
19
11
3
26
PUPEN5[12:8]
18
25
17
9
24
16
8
23
15
7
22
PUPEN5[7:0]
12
14
RESERVED
6
10
OMDEN5[12:8]
2
4
1
0
OMDEN5[7:0]
BITS
DESCRIPTION
[31:29]
RESERVED
PUPEN5
-
GPIO17 ~ GPIO5 port pin internal pull-up resister enable
There are 13 bits for this register, the corresponding bit is set to
“1” will enable pull-up resister on IO pin.
1 = enable
[28:16]
[15:13]
0 = disable
After power on the pull-up resisters are disable.
RESERVED
GPIO17 ~ GPIO5 output mode enable
1 = output mode
0 = input mode
[12:0]
OUTEN5
NOTE: Output mode enable bits are valid only when bit
PT5CFG12-0 is configured as general purpose I/O mode.
Each port pin can be enabled individually by setting the
corresponding control bit.
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