W90N745CD/W90N745CDG
AIC Interrupt Mask Register (AIC_IMR)
REGISTER
AIC_IMR
ADDRESS
R/W
DESCRIPTION
Interrupt Mask Register
RESET VALUE
R
0x0000_0000
0xFFF8_2114
31
IM31
23
30
29
28
IM28
20
27
IM27
19
26
IM26
18
25
24
IM30
22
IM29
21
IM25
17
IM24
16
IM23
15
IM22
14
IM21
13
IM20
12
IM19
11
IM18
10
IM17
9
IM16
8
IM15
7
IM14
6
IM13
5
IM12
4
IM11
3
IM10
2
IM9
1
IM8
0
IM7
IM6
IM5
IM4
IM3
IM2
IM1
RESERVED
BITS
[31:1]
[0]
DESCRIPTIONS
IMx: Interrupt Mask
This bit determines whether the corresponding interrupt channel is
enabled or disabled. Every interrupt channel can be active no matter
whether it is enabled or disabled. If an interrupt channel is enabled, it
does not definitely mean it is active. Every interrupt channel can be
authorized by the AIC only when it is both active and enabled.
0 = Corresponding interrupt channel is disabled
1 = Corresponding interrupt channel is enabled
IM x
Reserved
Reserved
AIC Output Interrupt Status Register (AIC_OISR)
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET VALUE
R
0x0000_0000
AIC_OISR 0xFFF8_2118
Output Interrupt Status Register
31
23
15
7
30
22
14
6
29
28
27
19
26
18
10
2
25
17
9
24
16
8
RESERVED
21
13
5
20
RESERVED
12
11
RESERVED
4
3
1
0
RESERVED
IRQ
FIQ
- 308 -
WINBOND [ WINBOND ]
