W90N745CD/W90N745CDG
BITS
DESCRIPTION
MasterInterruptEnable
[31]
MIE
Global interrupt disable. A write of ‘1’ disables all interrupts.
OwnershipChangeEnable
[30]
[29:7]
[6]
OCE
0: Ignore
1: Disable interrupt generation due to Ownership Change.
Reserved. Read/Write 0's
Reserved
RHSCE
RootHubStatusChangeEnable
0: Ignore
1: Disable interrupt generation due to Root Hub Status Change.
FrameNumberOverflowEnable
0: Ignore
[5]
[4]
[3]
FNOE
UREE
RDTE
1: Disable interrupt generation due to Frame Number Overflow.
UnrecoverableErrorEnable
This event is not implemented. All writes to this bit will be ignored.
ResumeDetectedEnable
0: Ignore
1: Disable interrupt generation due to Resume Detected.
StartOfFrameEnable
[2]
[1]
[0]
SOFE
WDHE
SCHOE
0: Ignore
1: Disable interrupt generation due to Start of Frame.
WritebackDoneHeadEnable
0: Ignore
1: Disable interrupt generation due to Write-back Done Head.
SchedulingOverrunEnable
0: Ignore
1: Disable interrupt generation due to Scheduling Overrun.
Publication Release Date: September 22, 2006
- 177 -
Revision A2
WINBOND [ WINBOND ]
