Preliminary W78E378/W78C378/W78C374
*SOARL: SOA register, low byte (Read/Write)
BIT
0
NAME
SL0
FUNCTION
SOA Low register bit 0
SOA Low register bit 1
SOA Low register bit 2
SOA Low register bit 3
SOA Low register bit 4
SOA Low register bit 5
1
SL1
2
SL2
3
SL3
4
SL4
5
SL5
6
(OVL)
(OVH)
OVL = 1: current H count larger than SOARL, for test
OVH = 1: current H count smaller than SOARH, for test
7
*SOARH: SOA register, high byte (Read/Write)
BIT
0
NAME
SH0
SH1
SH2
SH3
SH4
SH5
FUNCTION
SOA High register bit 0
SOA High register bit 1
SOA High register bit 2
SOA High register bit 3
SOA High register bit 4
SOA High register bit 5
1
2
3
4
5
6
(ADCSTRT) ADCSTRT bit status, for test
(WDTQ10) Watch Dog Timer, bit 10, for test
7
* ADC
Result of the A-to-D conversion.
* DAC0~DAC8
* DAC9~DAC10
* WDTCLR
8-bit PWM static DAC register.
8-bit PWM dynamic DAC register.
Watchdog-timer-clear register, without real hardware but an address.
Writing any value to WDTCLR will clear the watchdog timer.
Safe-Operation-Area Clear register, without real hardware but an address.
Writing any value to SOACLR will clear the SOAINT.
DDC1 latch buffer.
* SOACLR
* DDC1
* S1CON
* S1STA
* S1DAT
SIO1 control register.
SIO1 status register.
SIO1 data register.
* S1ADR1, S1ADR2 SIO1 address registers.
* S2CON
* S2STA
* S2DAT
SIO2 control register.
SIO2 status register.
SIO2 data register.
* S2ADR1, S2ADR2 SIO2 address registers.
- 14 -
WINBOND [ WINBOND ]
