W25Q16DV
8.7 AC Electrical Characteristics (cont’d)
SPEC
DESCRIPTION
SYMBOL
ALT
UNIT
MIN
TYP
MAX
/HOLD Active Hold Time relative to CLK
/HOLD Not Active Setup Time relative to CLK
/HOLD Not Active Hold Time relative to CLK
/HOLD to Output Low-Z
tCHHH
tHHCH
tCHHL
3
3
3
ns
ns
ns
ns
ns
ns
ns
µs
µs
(2)
tHHQX
tLZ
7
(2)
/HOLD to Output High-Z
tHLQZ
tHZ
12
(3)
Write Protect Setup Time Before /CS Low
Write Protect Hold Time After /CS High
/CS High to Power-down Mode
tWHSL
20
(3)
tSHWL
100
(2)
tDP
3
3
(2)
/CS High to Standby Mode without Electronic
Signature Read
tRES1
(2)
/CS High to Standby Mode with Electronic Signature
Read
tRES2
1.8
µs
(2)
/CS High to next Instruction after Suspend
Write Status Register Time
tSUS
20
15
µs
ms
µs
µs
ms
ms
ms
ms
s
tW
tBP1
tBP2
tPP
tSE
tBE1
tBE2
tCE
10
20
(4)
Byte Program Time (First Byte)
50
(4)
Additional Byte Program Time (After First Byte)
2.5
0.7
60
10
Page Program Time
3
(5)
Sector Erase Time (4KB)
Block Erase Time (32KB)
Block Erase Time (64KB)
Chip Erase Time
200/400
800
1,000
10
150
180
3
Notes:
1. Clock high + Clock low must be less than or equal to 1/fC.
2. Value guaranteed by design and/or characterization, not 100% tested in production.
3. Only applicable as a constraint for a Write Status Register instruction when SRP[1:0]=(0,1).
4. For multiple bytes after first byte within a page, tBPN = tBP1 + tBP2 * N (typical) and tBPN = tBP1 + tBP2 * N (max), where N =
number of bytes programmed.
5. Max Value tSE with <50K cycles is 200ms and >50K & <100K cycles is 400ms.
Publication Release Date: October 29, 2012
- 67 -
Revision D
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